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PDF W83601G Data sheet ( Hoja de datos )
| Número de pieza | W83601G | |
| Descripción | GPI/O Expander | |
| Fabricantes | nuvoton | |
| Logotipo |  |
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W83601G
Nuvoton GPI/O Expander
2009/Mar. Ver. 1.31
1 page  
W83601G
6.1 W83601G Universal General Purpose I/O Port for I2C BUS
PIN SYMBOL
I/O
FUNCTION
1 SCL
INts SMBus Clock. (I2C clock)
2
SDA
I/OD12ts SMBus bi-directional Data.(I2C data)
3
GP20
A0
I/O21
INcd
General Purpose I/O. This pin is a setting pin for SMBus (I2C)
address bit 0 during power-on reset or RST# pin reset.
4
GP21
A1
I/O21
INcd
General Purpose I/O. This pin is a setting pin for SMBus (I2C)
address bit 1 during power-on reset or RST# pin reset.
5
GP22
A2
I/O21
INcd
General Purpose I/O. This pin is a setting pin for SMBus (I2C)
address bit 2 during power-on reset or RST# pin reset.
6
GP10
I/OD24t General Purpose I/O default input.
7
GP11
I/OD24t General Purpose I/O default input.
8
GP23
I/OD24t General Purpose I/O default input.
9
GP24
I/OD24t General Purpose I/O default input.
10 VSS
PWR Ground Pin.
11 GP25 I/OD24t General Purpose I/O default input.
12
GP26
INT
I/OD24t
OD24
General Purpose I/O default input.
Auto-generate Interrupt signal when a transition on GPI inputs is
detected. This interrupt is either on pin12 or pin18.
13 GP12 I/OD24t General Purpose I/O default input.
14 GP13 I/OD24t General Purpose I/O default input.
15 GP14 I/OD24t General Purpose I/O default input.
16 GP15 I/OD24t General Purpose I/O default input.
17 GP16 I/OD24t General Purpose I/O default input.
18
GP17
INT
I/OD24t
OD24
General Purpose I/O default input.
Auto-generate Interrupt signal when a transition on GPI inputs is
detected. This interrupt is either on pin12 or pin18
19 RST#
20 VDD
Ints
PWR
Reset signal input.
Power Pin.
Publication Release Date: Mar, 2009
- 4 - Revision 1.31
5 Page 
W83601G
8. FUNCTION DESCRIPTIONS
8.1 ACCESS INTERFACE
The W83601G provides a two-wired serial interface which is compliant with SMBusTM 1.0 Write Byte and
Read Byte protocol.
8.1.1 Write a data into the W83601G register
0
SCL
780
78
SDA
0 0 1 1 A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Start By
Master
Frame 1
Serial Bus Address Byte
0 Ack
by
601R
Frame 2
Internal Index Register Byte
Ack
by
601R
SCL (Continued)
SDA (Continued)
78
D7 D6 D5 D4 D3 D2 D1 D0
Frame 3
Data Byte
Ack
by
601R
Stop
by
Master
8.1.2 Read a data from the W83601G register
0
SCL
SDA
Start By
Master
0
780
4 78
...
0 1 1 A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
...
Frame 1
Serial Bus Address Byte
0
Ack
by
601R
Frame 2
Pointer Byte
Ack
by
601R
SCL (Cont..)
0
SDA (Cont..)
Repea
Start
By
Master
0
780
78
0 1 1 A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Frame 3
Serial Bus Address Byte
1 Ack
by
601R
Frame 4
MSB Data Byte
No Ack
by
Master
Stop by
Master
- 10 -
Publication Release Date: Mar, 2009
Revision 1.31
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet W83601G.PDF ] | |
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