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PDF NUC745 Data sheet ( Hoja de datos )

Número de pieza NUC745
Descripción 16/32-bit ARM microcontroller
Fabricantes nuvoton 
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No Preview Available ! NUC745 Hoja de datos, Descripción, Manual

NUC745ADN
32-BIT ARM7TDMI-BASED MCU
NUC745
16/32-bit ARM microcontroller
Product Data Sheet

1 page




NUC745 pdf
NUC745ADN
1. GENERAL DESCRIPTION
The NUC745 is built around an outstanding CPU core, the 16/32 ARM7TDMI RISC processor which
designed by Advanced RISC Machines, Ltd. It offers 4K-byte I-cache/SRAM and 4K-byte D-
cache/SRAM, is a low power, general purpose integrated circuits. Its simple, elegant, and fully static
design is particularly suitable for cost sensitive and power sensitive applications.
One 100/10 Mbit MAC of Ethernet controller is built-in to reduce total system cost.
The NUC745 also provides one USB 1.1 host controller, one USB 1.1 device controller, one AC97/I²S
controller, one 2-channel GDMA, four independent UARTs, one watchdog timer, two 24-bit timers with
8-bit pre-scale, up to 31 programmable I/O ports, PS2 keyboard controller and an advanced interrupt
controller. The external bus interface (EBI) controller provides for SDRAM, ROM/SRAM, flash memory
and I/O devices. The system manager includes an internal 32-bit system bus arbiter and a PLL clock
controller.
With a wide range of serial communication and Ethernet interfaces, the NUC745 is suitable for
communication gateways as well as many other general purpose applications.
Publication Release Date: November 23, 2013
- 1 - Revision A3

5 Page





NUC745 arduino
NUC745ADN
3. PIN DIAGRAM
USBVDD
DP1
DN1
USBVSS
USBVSS
DN0
DP0
USBVDD
VDD33
TXD0/GPIO[5]
RXD0/GPIO[6]
TXD1/GPIO[7]
RXD1/GPIO[8]
CTS1/TXD2(IrDA)/PS2_CLK/GPIO[9]
RTS1/RXD2(IrDA)/PS2_DATA/GPIO[10]
VSS33
SCL0/SFRM/TIMER0/GPIO[11]
SDA0/SSPTXD/TIMER1/GPIO[12]
SCL1/SCLK/GPIO[13]/KPROW[3]
SDA1/SSPRXD/GPIO[14]/KPROW[2]
VDD18
VSS18
VDD33
VSS33
nRESET
TEST
PLLVDD18
PLLVSS18
PLLVSS18
PLLVDD18
nIRQ[0]/GPIO[16]
nIRQ[1]/GPIO[17]/USB_OVRCUR
5
10
15
20
25
30
35
nWAIT/GPIO[30]/nIRQ[3]
95 nOE
nECS[0]
nECS[1]
nECS[2]
VSS33
90 nECS[3]
A[20]
A[19]
A[18]
NUC745ADN
A[17]
85 VDD18
A[16]
A[15]
A[14]
VSS18
80 A[13]
A[12]
128-pin
A[11]
A[10]
LQFP
VDD33
75 A[9]
A[8]
A[7]
A[6]
A[5]
70 VSS33
A[4]
A[3]
A[2]
40 45
50 55
60
A[1]
65 A[0]
Figure 3.1 Pin Diagram
Publication Release Date: November 23, 2013
- 7 - Revision A3

11 Page







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