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PDF W77C32 Data sheet ( Hoja de datos )
| Número de pieza | W77C32 | |
| Descripción | 8-BIT MICROCONTROLLER | |
| Fabricantes | nuvoton | |
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W77C32/W77C032A Data Sheet
8-BIT MICROCONTROLLER
Table of Contents-
1. GENERAL DESCRIPTION .......................................................................................................... 3
2. FEATURES.................................................................................................................................. 3
3. PIN CONFIGURATIONS ............................................................................................................. 4
4. PIN DESCRIPTION ..................................................................................................................... 5
5. FUNCTIONAL DESCRIPTION .................................................................................................... 6
6. MEMORY ORGANIZATION ........................................................................................................ 8
6.1 Program Memory............................................................................................................. 8
6.2 Data Memory ................................................................................................................... 8
7. SPECIAL FUNCTION REGISTERS .......................................................................................... 10
7.1 External Interrupt Flag ................................................................................................... 16
7.2 Timer 2 Mode Control.................................................................................................... 23
7.2.1
Timer 2 Capture LSB ..............................................................................................24
8. INSTRUCTION .......................................................................................................................... 27
8.1 Instruction Timing .......................................................................................................... 34
8.2 MOVX Instruction .......................................................................................................... 36
8.3 External Data Memory Access Timing .......................................................................... 38
8.4 Wait State Control Signal .............................................................................................. 40
9. POWER MANAGEMENT .......................................................................................................... 42
9.1 Idle Mode....................................................................................................................... 42
9.2 Economy Mode.............................................................................................................. 42
9.3 Power Down Mode ........................................................................................................ 43
10. RESET CONDITIONS ............................................................................................................... 45
10.1 External Reset ............................................................................................................... 45
10.2 Watchdog Timer Reset ................................................................................................. 45
10.3 Reset State.................................................................................................................... 45
11. INTERRUPTS............................................................................................................................ 47
11.1 Interrupt Sources ........................................................................................................... 47
11.2 Priority Level Structure .................................................................................................. 48
11.3 Interrupt Response Time............................................................................................... 49
12. PROGRAMMABLE TIMERS/COUNTERS ................................................................................ 51
12.1
Timer/Counters 0 & 1 .................................................................................................... 51
12.1.1
Time-base Selection ...............................................................................................51
12.1.2
Mode 0 ....................................................................................................................52
Publication Release Date: February 1, 2007
- 1 - Revision A8
1 page  
W77C32/W77C032A
4. PIN DESCRIPTION
SYMBOL TYPE
DESCRIPTIONS
EA I EXTERNAL ACCESS ENABLE: It should be kept low.
PSEN
ALE
RST
XTAL1
XTAL2
VSS
VDD
P0.0−P0.7
P1.0−P1.7
O PROGRAM STORE ENABLE: PSEN enables the external ROM data onto the
Port 0 address/data bus during fetch and MOVC operations.
O
ADDRESS LATCH ENABLE: ALE is used to enable the address latch that
separates the address from the data on Port 0.
I
RESET: A high on this pin for two machine cycles while the oscillator is running
resets the device.
I
CRYSTAL1: This is the crystal oscillator input. This pin may be driven by an
external clock.
O CRYSTAL2: This is the crystal oscillator output. It is the inversion of XTAL1.
I GROUND: Ground potential
I POWER SUPPLY: Supply voltage for operation.
I/O
PORT 0: Port 0 is an open-drain bi-directional I/O port. This port also provides a
multiplexed low order address/data bus during accesses to external memory.
PORT 1: Port 1 is a bi-directional I/O port with internal pull-ups. The bits have
alternate functions which are described below:
T2(P1.0): Timer/Counter 2 external count input
T2EX(P1.1): Timer/Counter 2 Reload/Capture/Direction control
RXD1(P1.2): Serial port 1 RXD
I/O TXD1(P1.3): Serial port 1 TXD
INT2(P1.4): External Interrupt 2
INT3 (P1.5): External Interrupt 3
INT4(P1.6): External Interrupt 4
INT5 (P1.7): External Interrupt 5
P2.0−P2.7
I/O
PORT 2: Port 2 is a bi-directional I/O port with internal pull-ups. This port also
provides the upper address bits for accesses to external memory.
PORT 3: Port 3 is a bi-directional I/O port with internal pull-ups. All bits have
alternate functions, which are described below:
RXD(P3.0) : Serial Port 0 input
TXD(P3.1) : Serial Port 0 output
P3.0−P3.7
INT0 (P3.2) : External Interrupt 0
I/O
INT1(P3.3) : External Interrupt 1
T0(P3.4) : Timer 0 External Input
T1(P3.5) : Timer 1 External Input
P4.0−P4.3
WR (P3.6) : External Data Memory Write Strobe
RD (P3.7) : External Data Memory Read Strobe
PORT 4: Port 4 is a 4-bit bi-directional I/O port. The P4.0 also provides the
I/O
alternate function WAIT which is the wait state control signal.
* Note: TYPE I: input, O: output, I/O: bi-directional.
Publication Release Date: February 1, 2007
- 5 - Revision A8
5 Page 
W77C32/W77C032A
Stack Pointer
Bit: 7
SP.7
Mnemonic: SP
6
SP.6
5
SP.5
4
SP.4
321
SP.3 SP.2 SP.1
Address: 81h
0
SP.0
The Stack Pointer stores the Scratchpad RAM address where the stack begins. In other words, it
always points to the top of the stack.
Data Pointer Low
Bit: 7
DPL.7
Mnemonic: DPL
6
DPL.6
5
DPL.5
4
DPL.4
321
DPL.3 DPL.2 DPL.1
Address: 82h
0
DPL.0
This is the low byte of the standard 8052 16-bit data pointer.
Data Pointer High
Bit:
7
DPH.7
6
DPH.6
5
DPH.5
4
DPH.4
3
DPH.3
2
DPH.2
1
DPH.1
0
DPH.0
Mnemonic: DPH
Address: 83h
This is the high byte of the standard 8052 16-bit data pointer.
Data Pointer Low1
Bit: 7 6 5 4 3 2 1 0
DPL1.7 DPL1.6 DPL1.5 DPL1.4 DPL1.3 DPL1.2 DPL1.1 DPL1.0
Mnemonic: DPL1
Address: 84h
This is the low byte of the new additional 16-bit data pointer that has been added to the W77C032. The
user can switch between DPL, DPH and DPL1, DPH1 simply by setting register DPS = 1. The
instructions that use DPTR will now access DPL1 and DPH1 in place of DPL and DPH. If they are not
required they can be used as conventional register locations by the user.
Data Pointer High1
Bit: 7 6 5 4 3 2 1 0
DPH1.7 DPH1.6 DPH1.5 DPH1.4 DPH1.3 DPH1.2 DPH1.1 DPH1.0
Mnemonic: DPH1
Address: 85h
This is the high byte of the new additional 16-bit data pointer that has been added to the W77C032.
The user can switch between DPL, DPH and DPL1, DPH1 simply by setting register DPS = 1. The
instructions that use DPTR will now access DPL1 and DPH1 in place of DPL and DPH. If they are not
required they can be used as conventional register locations by the user.
- 11 -
Publication Release Date: February 1, 2007
Revision A8
11 Page | ||
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