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PDF M0564SG4AE Data sheet ( Hoja de datos )
| Número de pieza | M0564SG4AE | |
| Descripción | 32-BIT MICROCONTROLLER | |
| Fabricantes | nuvoton | |
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M0564
ARM CORTEX® -M
32-BIT MICROCONTROLLER
NuMicro® Family
M0564 Series
Datasheet
The information described in this document is the exclusive intellectual property of
Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton.
Nuvoton is providing this document only for reference purposes of NuMicro microcontroller based
system design. Nuvoton assumes no responsibility for errors or omissions.
All data and specifications are subject to change without notice.
For additional information or questions, please contact: Nuvoton Technology Corporation.
www.nuvoton.com
May 05, 2017
Page 1 of 161
Rev 1.00
1 page  
M0564
8.4.7 12-bit ADC....................................................................................................................150
8.4.8 Analog Comparator ......................................................................................................152
8.5 Flash DC Electrical Characteris ............................................................................... 153
8.6 I2C Dynamic Characteristics.................................................................................... 154
8.7 SPI Dynamic Characteristics ................................................................................... 155
8.7.1 Dynamic Characteristics of Data Input and Output Pin.................................................155
9 PACKAGE DIMENSIONS............................................................................... 157
9.1 LQFP 100L (14x14x1.4 mm footprint 2.0 mm)......................................................... 157
9.2 LQFP 64L (7x7x1.4 mm footprint 2.0 mm)............................................................... 158
9.3 LQFP 48L (7x7x1.4mm2 Footprint 2.0mm) ............................................................. 159
10 REVISION HISTORY...................................................................................... 160
May 05, 2017
Page 5 of 161
Rev 1.00
5 Page 
M0564
2 FEATURES
2.1 NuMicro® M0564 Features
Core
– ARM® Cortex® -M0 core running up to 72 MHz
– One 24-bit system timer
– Supports low power sleep mode
– Single-cycle 32-bit hardware multiplier
– NVIC for the 32 interrupt inputs, each with 4-levels of priority
– Supports programmable mask-able interrupts
– Serial Wire Debug supports with 2 watch-points/4 breakpoints
Built-in LDO for wide operating voltage ranged from 2.5V to 5.5V
Flash Memory
– Supports 256/128 KB application ROM (APROM)
– Supports 4 KB Flash for loader (LDROM)
– Supports 2 KB Security Protection Rom (SPROM)
– Supports 12 bytes User Configuration block to control system initiation
– Supports Data Flash with configurable memory size
– Supports 2 KB page erase for all embedded flash
– Supports In-System-Programming (ISP), In-Application-Programming (IAP) update
embedded flash memory
– Supports CRC-32 checksum calculation function
– Supports flash all one verification function
– Hardware external read protection of whole flash memory by Security Lock Bit
– Supports 2-wired ICP update through SWD/ICE interface
SRAM Memory
– 20 KB embedded SRAM
– Supports byte-, half-word- and word-access
– Supports PDMA mode
Hardware Divider
– Signed (two’s complement) integer calculation
– 32-bit dividend with 16-bit divisor calculation capacity
– 32-bit quotient and 32-bit remainder outputs (16-bit remainder with sign extends to 32-
bit)
– Divided by zero warning flag
– 6 HCLK clocks taken for one cycle calculation
– Write divisor to trigger calculation
– Waiting for calculation ready automatically when reading quotient and remainder
PDMA (Peripheral DMA)
– Supports 5 independent configurable channels for automatic data transfer between
memories and peripherals
– Supports single and burst transfer type
– Supports Normal and Scatter-Gather Transfer modes
– Supports two types of priorities modes: Fixed-priority and Round-robin modes
– Supports byte-, half-word- and word-access
– Supports incrementing mode for the source and destination address for each channel
– Supports time-out function for channel 0 and channel 1
– Supports software and SPI/I2S, UART, USCI, ADC, PWM and TIMER request
Clock Control
May 05, 2017
Page 11 of 161
Rev 1.00
11 Page | ||
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