DataSheet.es    


PDF MT4HTF3264HZ Data sheet ( Hoja de datos )

Número de pieza MT4HTF3264HZ
Descripción 256MB DDR2 SDRAM SODIMM
Fabricantes Micron 
Logotipo Micron Logotipo



Hay una vista previa y un enlace de descarga de MT4HTF3264HZ (archivo pdf) en la parte inferior de esta página.


Total 17 Páginas

No Preview Available ! MT4HTF3264HZ Hoja de datos, Descripción, Manual

256MB, 512MB, 1GB (x64, SR) 200-Pin DDR2 SODIMM
Features
DDR2 SDRAM SODIMM
MT4HTF3264HZ – 256MB
MT4HTF6464HZ – 512MB
MT4HTF12864HZ – 1GB
Features
• 200-pin, small-outline dual in-line memory module
(SODIMM)
• Fast data transfer rates: PC2-3200, PC2-4200,
PC2-5300, or PC2-6400
• 256MB (32 Meg x 64), 512MB (64 Meg x 64), 1GB
(128 Meg x 64)
• VDD = VDDQ = 1.8V
• VDDSPD = 1.7–3.6V
• JEDEC-standard 1.8V I/O (SSTL_18-compatible)
• Differential data strobe (DQS, DQS#) option
• 4n-bit prefetch architecture
• Multiple internal device banks for concurrent opera-
tion
• Programmable CAS latency (CL)
• Posted CAS additive latency (AL)
• WRITE latency = READ latency - 1 tCK
• Programmable burst lengths (BL): 4 or 8
• Adjustable data-output drive strength
• 64ms, 8192-cycle refresh
• On-die termination (ODT)
• Halogen-free
• Serial presence detect (SPD) with EEPROM
• Gold edge contacts
• Single rank
Figure 1: 200-Pin SODIMM (MO-224 R/C C)
Module height: 30mm (1.181in)
Options
• Operating temperature
– Commercial (0°C TA +70°C)
– Industrial (–40°C TA +85°C)1
• Package
– 200-pin DIMM (halogen-free)
• Frequency/CL2
– 2.5ns @ CL = 5 (DDR2-800)
– 2.5ns @ CL = 6 (DDR2-800)
– 3.0ns @ CL = 5 (DDR2-667)
Marking
None
I
Z
-80E
-800
-667
Notes: 1. Contact Micron for industrial temperature
module offerings.
2. CL = CAS (READ) latency.
Table 1: Key Timing Parameters
Speed
Grade
-80E
-800
-667
-53E
-40E
Industry
Nomenclature
PC2-6400
PC2-6400
PC2-5300
PC2-4200
PC2-3200
CL = 6
800
800
Data Rate (MT/s)
CL = 5
CL = 4
800 533
667 533
667 553
– 553
– 400
CL = 3
400
400
400
400
400
tRCD
(ns)
12.5
15
15
15
15
tRP
(ns)
12.5
15
15
15
15
tRC
(ns)
55
55
55
55
55
PDF: 09005aef83c05a5d
htf4c32_64_128x64hz.pdf - Rev. D 4/14 EN
1 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.

1 page




MT4HTF3264HZ pdf
256MB, 512MB, 1GB (x64, SR) 200-Pin DDR2 SODIMM
Pin Descriptions
Table 7: Pin Descriptions (Continued)
Symbol
SDA
RDQSx,
RDQS#x
Err_Out#
VDD/VDDQ
VDDSPD
VREF
VSS
NC
NF
NU
RFU
Type
I/O
Output
Output
(open drain)
Supply
Supply
Supply
Supply
Description
Serial data: Used to transfer addresses and data into and out of the SPD EEPROM on
the I2C bus.
Redundant data strobe (x8 devices only): RDQS is enabled/disabled via the LOAD
MODE command to the extended mode register (EMR). When RDQS is enabled, RDQS
is output with read data only and is ignored during write data. When RDQS is disa-
bled, RDQS becomes data mask (see DMx). RDQS# is only used when RDQS is enabled
and differential data strobe mode is enabled.
Parity error output: Parity error found on the command and address bus.
Power supply: 1.8V ±0.1V. The component VDD and VDDQ are connected to the mod-
ule VDD.
SPD EEPROM power supply: 1.7–3.6V.
Reference voltage: VDD/2.
Ground.
No connect: These pins are not connected on the module.
No function: These pins are connected within the module, but provide no functional-
ity.
Not used: These pins are not used in specific module configurations/operations.
Reserved for future use.
PDF: 09005aef83c05a5d
htf4c32_64_128x64hz.pdf - Rev. D 4/14 EN
5 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.

5 Page





MT4HTF3264HZ arduino
256MB, 512MB, 1GB (x64, SR) 200-Pin DDR2 SODIMM
IDD Specifications
Table 11: DDR2 IDD Specifications and Conditions – 256MB (Die Revision H)
Values shown for MT47H32M16 DDR2 SDRAM only and are computed from values specified in the 512Mb (32 Meg x 16)
component data sheet
Parameter
-80E/
Symbol -800 -667 Units
Operating one bank active-precharge current:tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS MIN (IDD); CKE is HIGH, S# is HIGH between valid commands; Address bus
inputs are switching; Data bus inputs are switching
IDD0
TBD TBD mA
Operating one bank active-read-precharge current: IOUT = 0mA; BL = 4, CL = CL
(IDD), AL = 0; tCK = tCK (IDD), tRC = tRC (IDD), tRAS = tRAS MIN (IDD), tRCD = tRCD (IDD);
CKE is HIGH, S# is HIGH between valid commands; Address bus inputs are switching;
Data pattern is same as IDD4W
Precharge power-down current: All device banks idle; tCK = tCK (IDD); CKE is LOW;
Other control and address bus inputs are stable; Data bus inputs are floating
IDD1
IDD2P
TBD TBD mA
TBD TBD mA
Precharge quiet standby current: All device banks idle; tCK = tCK (IDD); CKE is
HIGH, S# is HIGH; Other control and address bus inputs are stable; Data bus inputs
are floating
IDD2Q
TBD TBD mA
Precharge standby current: All device banks idle; tCK = tCK (IDD); CKE is HIGH, S# is
HIGH; Other control and address bus inputs are switching; Data bus inputs are
switching
IDD2N
TBD TBD mA
Active power-down current: All device banks open; tCK = tCK
(IDD); CKE is LOW; Other control and address bus inputs are stable;
Data bus inputs are floating
Fast PDN exit
MR[12] = 0
Slow PDN exit
MR[12] = 1
IDD3P
TBD TBD mA
TBD TBD
Active standby current: All device banks open; tCK = tCK (IDD), tRAS = tRAS MAX
(IDD), tRP = tRP (IDD); CKE is HIGH, S# is HIGH between valid commands; Other control
and address bus inputs are switching; Data bus inputs are switching
IDD3N
TBD TBD mA
Operating burst write current: All device banks open; Continuous burst writes; BL
= 4, CL = CL (IDD), AL = 0; tCK = tCK (IDD), tRAS = tRAS MAX (IDD), tRP = tRP (IDD); CKE is
HIGH, S# is HIGH between valid commands; Address bus inputs are switching; Data
bus inputs are switching
IDD4W
TBD TBD
mA
Operating burst read current: All device banks open; Continuous burst read, IOUT
= 0mA; BL = 4, CL = CL (IDD), AL = 0; tCK = tCK (IDD), tRAS = tRAS MAX (IDD), tRP = tRP
(IDD); CKE is HIGH, S# is HIGH between valid commands; Address bus inputs are
switching; Data bus inputs are switching
IDD4R
TBD TBD mA
Burst refresh current:tCK = tCK (IDD); REFRESH command at every tRFC (IDD) inter-
val; CKE is HIGH, S# is HIGH between valid commands; Other control and address bus
inputs are switching; Data bus inputs are switching
IDD5
TBD TBD mA
Self refresh current: CK and CK# at 0V; CKE 0.2V; Other control and address bus IDD6 TBD TBD mA
inputs are floating; Data bus inputs are floating
Operating bank interleave read current: All device banks interleaving reads; IOUT
= 0mA; BL = 4, CL = CL (IDD), AL = tRCD (IDD) - 1 × tCK (IDD); tCK = tCK (IDD), tRC = tRC
(IDD), tRRD = tRRD (IDD), tRCD = tRCD (IDD); CKE is HIGH, S# is HIGH between valid
commands; Address bus inputs are stable during deselects; Data bus inputs are
switching
IDD7
TBD TBD mA
PDF: 09005aef83c05a5d
htf4c32_64_128x64hz.pdf - Rev. D 4/14 EN
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.

11 Page







PáginasTotal 17 Páginas
PDF Descargar[ Datasheet MT4HTF3264HZ.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
MT4HTF3264HYDDR2 SDRAM SODIMMMicron Technology
Micron Technology
MT4HTF3264HZ256MB DDR2 SDRAM SODIMMMicron
Micron

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar