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PDF CAT93C57RD4I Data sheet ( Hoja de datos )

Número de pieza CAT93C57RD4I
Descripción 2K-Bit Microwire Serial EEPROM
Fabricantes Catalyst Semiconductor 
Logotipo Catalyst Semiconductor Logotipo



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No Preview Available ! CAT93C57RD4I Hoja de datos, Descripción, Manual

CAT93C56/57 (Die Rev. E)
2K-Bit Microwire Serial EEPROM
FEATURES
ALOGEN FR
LEA D F REETM
I High speed operation: 1MHz
I Low power CMOS technology
I 1.8 to 6.0 volt operation
I Selectable x8 or x16 memory organization
I Self-timed write cycle with auto-clear
I Hardware and software write protection
I Power-up inadvertant write protection
I 1,000,000 Program/erase cycles
I 100 year data retention
I Commercial, industrial and automotive
temperature ranges
I Sequential read
I “Green” package option available
DESCRIPTION
The CAT93C56/57 are 2K-bit Serial EEPROM memory
devices which are configured as either registers of 16
bits (ORG pin at VCC) or 8 bits (ORG pin at GND). Each
register can be written (or read) serially by using the
DI (or DO) pin. The CAT93C56/57 are manufactured
using Catalyst’s advanced CMOS EEPROM floating
gate technology. The devices are designed to endure
1,000,000 program/erase cycles and has a data reten-
tion of 100 years. The devices are available in 8-pin DIP,
8-pin SOIC, 8-pin TSSOP and 8-pad TDFN packages.
PIN CONFIGURATION
DIP Package (P, L)
CS 1
SK 2
DI 3
DO 4
8 VCC
7 NC
6 ORG
5 GND
SOIC Package (J,W)
NC
VCC
CS
SK
1
2
3
4
8 ORG
7 GND
6 DO
5 DI
SOIC Package (S,V)
CS 1
SK 2
DI 3
DO 4
8 VCC
7 NC
6 ORG
5 GND
SOIC Package (K,X)
CS 1
SK 2
DI 3
DO 4
8 VCC
7 NC
6 ORG
5 GND
TSSOP Package (U,Y)
CS 1
SK 2
DI 3
DO 4
8 VCC
7 NC
6 ORG
5 GND
TDFN Package (RD4, ZD4)
VCC 8
NC 7
ORG 6
GND 5
1 CS
2 SK
3 DI
4 DO
Bottom View
FUNCTIONAL SYMBOL
VCC
ORG
CS
SK
NC
DI
DO
GND
PIN FUNCTIONS
Pin Name
CS
Function
Chip Select
SK Clock Input
DI Serial Data Input
DO Serial Data Output
VCC
GND
+1.8 to 6.0V Power Supply
Ground
ORG
Memory Organization
NC No Connection
Note: When the ORG pin is connected to VCC, the x16 organiza-
tion is selected. When it is connected to ground, the x8 pin is
selected. If the ORG pin is left unconnected, then an internal pullup
device will select the x16 organization.
© 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice.
Doc. No. 1088, Rev. M

1 page




CAT93C57RD4I pdf
Figure 1. Sychronous Data Timing
tSKHI
SK
tDIS
DI VALID
tCSS
CS
DO
CAT93C56/57
tSKLOW
VALID
tDIH
tCSH
tDIS
tPD0,tPD1
tCSMIN
DATA VALID
Figure 2. Read Instruction Timing
SK
1 11 1 111 11 1 1 1 1 1 1
CS
AN AN1
DI
11
0
A0
Don't Care
HIGH-Z
DO
Dummy 0
D15 . . . D0
or
D7 . . . D0
Address + 1
D15 . . . D0
or
D7 . . . D0
Address + 2
D15 . . . D0
or
D7 . . . D0
Address + n
D15 . . .
or
D7 . . .
Figure 3. Write Instruction Timing
SK
CS
AN AN-1
DI 1 0 1
A0 DN
HIGH-Z
DO
5
tCSMIN
STATUS
VERIFY
D0
STANDBY
tSV BUSY
READY
tEW
tHZ
HIGH-Z
Doc. No. 1088, Rev. M

5 Page










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