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PDF M58725P-15 Data sheet ( Hoja de datos )
| Número de pieza | M58725P-15 | |
| Descripción | 16K-Bit Static RAM | |
| Fabricantes | Mitsubishi | |
| Logotipo |  |
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MITSUBISHI LSI.
M58725P, -15
16 384-BIT (2048-WORD BY 8-BIT) STATIC RAM
DESCRIPTION
This is a family of 2048-word by 8-bit static RAMs, fabri-
cated with the N-channel silicon-gate MOS process and
designed for simple interfacing. These devices operate
on a single 5V supply, as does TIL, and are directly TIL-
compatible.
The input and output terminals are common, and an
OE terminal is provided. S controls the power-down fea-
ture.
FEATURES
• Fast access time:
M58725P
M58725 P-15
200ns (max)
150ns (max)
• Low power dissipation:
Active:
Stand by:
250mW (typ)
25mW (typ)
• Power down by S
.Single 5V supply voltage (±10% tolerance)
• Requires neither external clock nor refreshing
• All inputs and outputs are directly TIL compatible
-All outputs are three-state, with OR-tie capability
- Easy memory expansion by chip-select (5) input
-Common data DO terminals_
-Same pin configuration as M5L2716K 16 384-bit EPROM
APPLICATION
-Small-capacity memory units
FUNCTION
These devices provide common data input and output
terminals. During a write cycle, when a location is desig-
nated by address signals Ao-A IO the OE signal is kept high
to keep the DO terminals in the input mode, signal W goes
low, and the data of the DO signal at that time is written.
1 -BLOCK DIAGRAM
PIN CONFIGURATION (TOP VIEW)
ADDRESS
INPUTS
100, ++
DATA
INPUTS/ DO, +->
OUTPUTS
DO, ++
9
(OV) GND
Vee (5V)
__ A,
-- A,
__ IN
ADDRESS
} INPUTS
WRITE CON-
TROL INPUT
OUTPUT
ENABLE INPUT
ADDRESS
INPUT
CHIP SELECT
INPUT
17 ++ DO,)
++ DOl
DATA
++ DO, INPUTS/
OUTPUTS
++ DOs
++ DO.
Outline 24P4
During a read cycle, when a location is designated by
address signals Ao-A IO the DE signal is kept low to keep
the DO terminals in the output mode, signal W goes high,
and the data of the designated address is available at the
I/O terminals,
When signal 5 is high, the chip is in the non-selectable
state, disabling both reading and writing. In this case the
output is in the floating (high-impedance) state, useful for
OR-ties with other output terminals.
Signal 5 controls the power down feature. When 5
goes high power dissipation is reduced to 1/10 of active
power. The access time from 5 is equivalent to the address
access time.
OUTPUT
ENABLE INPUT
ADD RESS INPUTS
128 2048-WORDx8-BIT
(128 ROWSx
12B COLUMNS)
DATA
INPUTS/OUTPUTS
16
CHIP SELECT INPUT
WRITE CONI~~8f
IN 2')--------------------~
-.. MITSUBISHI
.... ELECTRIC
3-3
1 page  
Write Cycle 1 (W Control Mode)
Ao-AlO
MITSUBISHI LSls
M58725P, -15
16 384-BIT (2048-WORD BY 8-BIT) STATIC RAM
lew
Isu (51
Isu (A)
IW(WI
w
DQ (NOTE 41
--------1------((DATA INPUTSI
DQ
»»»»»»)Y(DATA OUTPUTSI
Isu (D)
DATA IN STABLE
Write Cycle 2 (8" Control Mode)
lew
Isu (5)
Iwr
Iw(w)
w
Isu (D)
Ih (D)
(DATA DINQPUTS(NI OTE~41---------+--~----{
DATA IN STABLE
~----------------~
tpzx(S)
~
DQ (NOTE~5)~________________~~·~+4-+~t_p_xz_(__W_)____________________________________
(DATA OUTPUTS)
OE = low level
Note 2. Testconditions
Input pulse level
0.4 -2.4V
Input pulse rise time lOns
Input pulse fall time 10ns
Reference level
Load
1.5 V
lTTL. CL = 100pF
Note 3. Either the high or low state is possible.
4. When the DO pin is in the output state, a reverse phase signal should not be
applied externally.
5. When the falling edge of Wis simultaneous to or prior to the falling edge of $,
the output is maintained in the high-impedance state
• MITSUBISHI
"'ELECTRIC
3-7
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet M58725P-15.PDF ] | |
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