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PDF SAM9G20 Data sheet ( Hoja de datos )
| Número de pieza | SAM9G20 | |
| Descripción | SMART ARM-based Embedded MPU | |
| Fabricantes | ATMEL Corporation | |
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SAM9G20
Atmel | SMART ARM-based Embedded MPU
Description
The Atmel® | SMART SAM9G20 embedded microprocessor unit is based on the
integration of an ARM926EJ-S™ processor with fast ROM and RAM memories
and a wide range of peripherals.
The SAM9G20 embeds an Ethernet MAC, one USB Device Port, and a dual port
USB Host controller with on-chip USB transceivers. It also integrates several
standard peripherals, such as the USART, SPI, TWI, Timer Counters,
Synchronous Serial Controller, ADC and MultiMedia Card Interface.
The SAM9G20 is architectured on a 6-layer matrix, allowing a maximum internal
bandwidth of six 32-bit buses. It also features an External Bus Interface capable
of interfacing with a wide range of memory devices.
The SAM9G20 is an enhancement of the SAM9260 with the same peripheral
features. It is pin-to-pin compatible with the exception of power supply pins.
Speed is increased to reach 400 MHz on the ARM core and 133 MHz on the
system bus and EBI.
Atmel-6384F-ATARM-SAM9G20-Datasheet_09-Nov-15
1 page  
1. SAM9G20 Block Diagram
Figure 1-1. SAM9G20 Block Diagram
MASTER
SLAVE
TST
FIQ
IRQ0–IRQ2
DRXD
DTXD
PCK0–PCK1
XIN
XOUT
OSCSEL
XIN32
XOUT32
SHDN
WKUP
VDDBU
VDDCORE
NRST
System
Controller
AIC
DBGU
PDC
PLLA
PLLB
Main
Oscillator
WDT
PMC
PIT
RC 128-bit
Osc. GPBR
Slow Clock RTT
Oscillator
SHDWC
POR
POR RSTC
PIOA
PIOB
PIOC
JTAG Selection and Boundary Scan
In-Circuit Emulator
ARM926EJ-S Processor
ICache
32 Kbytes
I
MMU
Bus Interface
DCache
32 Kbytes
D
10/100 Ethernet
MAC
FIFO
FIFO
DMA
Image
Sensor
Interface
DMA
6-layer Matrix
ROM
64 Kbytes
Fast SRAM Fast SRAM
16 Kbytes 16 Kbytes
APB
Peripheral
Bridge
24-channel
Peripheral
DMA
PDC
MCI
PDC
TWI
PDC
USART0
USART1
USART2
USART3
USART4
USART5
PDC
SPI0
SPI1
TC0 TC3
TC1 TC4
TC2 TC5
PDC
SSC
PDC
4-channel
10-bit
ADC
DPRAM
USB
Device
Transc. Transc.
USB
OHCI
DMA
EBI
CompactFlash
NAND Flash
SDRAM
Controller
Static
Memory
Controller
ECC
Controller
Transceiver
D0–D15
A0/NBS0
A1/NBS2/NWR2
A2–A15, A18–A20
A16/BA0
A17/BA1
NCS0
NCS1/SDCS
NRD/CFOE
NWR0/NWE/CFWE
NWR1/NBS1/CFIOR
NWR3/NBS3/CFIOW
SDCK, SDCKE
RAS, CAS
SDWE, SDA10
NANDOE, NANDWE
A21/NANDALE, A22/NANDCLE
D16–D31
NWAIT
A23–A24
NCS4/CFCS0
NCS5/CFCS1
A25/CFRNW
CFCE1–CFCE2
NCS2, NCS6, NCS7
NCS3/NANDCS
SPI0_, SPI1_
5 Page 
3. Package and Pinout
The SAM9G20 is available in the following Green-compliant packages:
217-ball LFBGA, 15 x 15 mm x 1.4 mm (0.8 mm pitch)
247-ball TFBGA, 10 x 10 x 1.1 mm (0.5 mm pitch)
3.1 217-ball LFBGA Package Outline
Figure 3-1 shows the orientation of the 217-ball LFBGA package.
A detailed mechanical description is given in Section 41.1 “217-ball LFBGA Package Drawing”.
Figure 3-1. 217-ball LFBGA Package (Top View)
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Ball A1
A BCDE FGH J K LMNPR T U
3.2 217-ball LFBGA Pinout
Table 3-1. Pinout for 217-ball LFBGA Package
Pin Signal Name
Pin Signal Name
A1 CFIOW/NBS3/NWR3 D5 A5
A2 NBS0/A0
D6 GND
A3 NWR2/NBS2/A1
D7 A10
A4 A6
D8 GND
A5 A8
D9 VDDCORE
A6 A11
D10 GNDUSB
A7 A13
D11 VDDIOM
A8 BA0/A16
D12 GNDUSB
A9 A18
D13 DDM
A10 A21
D14 HDPB
A11 A22
D15 NC
A12 CFWE/NWE/NWR0
D16 VDDBU
A13 CFOE/NRD
D17 XIN32
A14 NCS0
E1 D10
Pin Signal Name
J14 TDO
J15 PB19
J16 TDI
J17 PB16
K1 PC24
K2 PC20
K3 D15
K4 PC21
K8 GND
K9 GND
K10 GND
K14 PB4
K15 PB17
K16 GND
Pin Signal Name
P17 PB5
R1 NC
R2 GNDANA
R3 PC29
R4 VDDANA
R5 PB12
R6 PB23
R7 GND
R8 PB26
R9 PB28
R10 PA0
R11 PA4
R12 PA5
R13 PA10
SAM9G20 [DATASHEET]
Atmel-6384F-ATARM-SAM9G20-Datasheet_09-Nov-15
11
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SAM9G20.PDF ] | |
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