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PDF IMX35 Data sheet ( Hoja de datos )

Número de pieza IMX35
Descripción Applications Processors
Fabricantes Freescale Semiconductor 
Logotipo Freescale Semiconductor Logotipo



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Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MCIMX35SR2AEC
Rev. 10, 06/2012
IMX35
i.MX35 Applications
Processors for
Automotive Products
Package Information
Plastic Package
Case 5284 17 x 17 mm, 0.8 mm Pitch
Ordering Information
See Table 1 on page 3 for ordering information.
1 Introduction
The i.MX35 Auto Application Processor family is
designed for automotive infotainment and navigation
applications. These processors are AECQ100 Grade 3
qualified and rated for ambient operating temperatures
up to 85 °C.
Based on an ARM11 microprocessor core running at up
to 532 MHz, the device offers the following features and
optimized system cost for the target applications.
• Audio connectivity and telematics:
— Compressed audio playback from storage
devices (CD, USB, HDD or SD card)
— PlayFromDevice (1-wire and 2-wire
support) for portable media players
— iPod/iPhone control and playback
— High-speed CD ripping to USB, SD/MMC
or HDD for virtual CD changer
— Audio processing for hands-free telephony:
Bluetooth, AEC/NS, and microphone beam
forming
— Speech recognition
1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Functional Description and Application Information. . . . . . 4
2.1. Application Processor Domain Overview . . . . . . . . . 5
2.2. Shared Domain Overview . . . . . . . . . . . . . . . . . . . . 6
2.3. Advanced Power Management Overview . . . . . . . . 6
2.4. ARM11 Microprocessor Core. . . . . . . . . . . . . . . . . . 6
2.5. Module Inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3. Signal Descriptions: Special Function Related Pins . . . . 12
4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1. i.MX35 Chip-Level Conditions . . . . . . . . . . . . . . . . 13
4.2. Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.3. Supply Power-Up/Power-Down Requirements and
Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.4. Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.5. Power Characteristics . . . . . . . . . . . . . . . . . . . . . . 19
4.6. Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . 20
4.7. I/O Pin DC Electrical Characteristics . . . . . . . . . . . 21
4.8. I/O Pin AC Electrical Characteristics . . . . . . . . . . . 24
4.9. Module-Level AC Electrical Specifications . . . . . . . 30
5. Package Information and Pinout . . . . . . . . . . . . . . . . . . 131
5.1. MAPBGA Production Package 1568-01, 17 × 17 mm,
0.8 Pitch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
5.2. MAPBGA Signal Assignments . . . . . . . . . . . . . . . 133
6. Product Documentation . . . . . . . . . . . . . . . . . . . . . . . . . 145
7. Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
© Freescale Semiconductor, Inc., 2010. All rights reserved.

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IMX35 pdf
1.3 Block Diagram
Figure 1 is the i.MX35 simplified interface block diagram.
DDR2/SDDR
RAM
NOR
Flash/
PSRAM
NAND
Flash
Camera
Sensor
LCD Display 1 External Graphics
LCD Display 2 Accelerator
External Memory
Interface (EMI)
Smart
DMA
SPBA
Peripherals
MSHC
ESAI
SPDIF
SSI
UART
ASRC
CSPI
ATA
FEC
3 FuseBox
ARM11
Platform
ARM1136JF-S
VFP
L1 I/D cache
L2 cache
AVIC
MAX
AIPS (2)
ETM
Internal
Memory
Image
Processing Unit
(IPU)
ARM1136 Platform Peripherals
SSI
AUDMUX
I2C(3)
UART(2)
CSPI
CAN(2)
MLB
IIM
RTICv3
RNGC
SCC
KPP
PWM
OWIRE
HS USBOTG
HS USBOTGPHY
HS USBHost
FS USBPHY
GPU 2D
eSDHC(3)
ECT
IOMUX
GPIO(3)
EPIT
Timers
RTC
WDOG
GPT
Audio/Power
Management JTAG
Bluetooth
MMC/SDIO
or WLAN
Keypad
Connectivity
Access
Figure 1. i.MX35 Simplified Interface Block Diagram
2 Functional Description and Application Information
The i.MX35 consists of the following major subsystems:
• ARM1136 Platform—AP domain
• SDMA Platform and EMI—Shared domain
2.1 Application Processor Domain Overview
The applications processor (AP) and its domain are responsible for running the operating system and
applications software, providing the user interface, and supplying access to integrated and external
peripherals. The AP domain is built around an ARM1136JF-S core with 16-Kbyte instruction and data L1
caches, an MMU, a 128-Kbyte L2 cache, a multiported crossbar switch, and advanced debug and trace
interfaces.
i.MX35 Applications Processors for Automotive Products, Rev. 10
Freescale Semiconductor
5

5 Page





IMX35 arduino
Table 4. Digital and Analog Modules (continued)
Block
Mnemonic
Block Name
Domain1
Subsystem
Brief Description
OSC24M
OSC24M
24-MHz
reference
oscillator
MPLL
PPLL
Digital
phase-locked
loops
Analog
SDMA
PWM
Pulse-width
modulator
ARM
RTC
Real-time
clock
ARM
Clock
Clocks
ARM1136
platform
peripherals
Clocks
SDMA Smart DMA
engine
SDMA
System
controls
SJC
SPBA
S/PDIF
SSI(2)
Secure JTAG ARM
controller
SDMA
SDMA
peripheral bus
arbiter
Serial audio
interface
SDMA
Synchronous SDMA,
serial interface ARM(2)
Pins
System
controls
Connectivity
peripherals
Connectivity
peripherals
UART(3)
Universal
asynchronous
receiver/trans
mitters
ARM
(UART1,2)
SDMA
(UART3)
Connectivity
peripherals
The signal from the external 24-MHz crystal is the source of the
CLK24M signal fed into USB PHY as the reference clock and to the
real time clock (RTC).
DPLLs are used to generate the clocks:
MCU PLL (MPLL)—programmable
Peripheral PLL (PPLL)—programmable
The pulse-width modulator (PWM) is optimized to generate sound
from stored sample audio images; it can also generate tones.
Provides the ARM1136 platform with a clock function (days, hours,
minutes, seconds) and includes alarm, sampling timer, and minute
stopwatch capabilities.
The SDMA provides DMA capabilities inside the processor. It is a
shared module that implements 32 DMA channels and has an
interface to connect to the ARM1136 platform subsystem, EMI
interface, and the peripherals.
The secure JTAG controller (SJC) provides debug and test control
with maximum security.
The SPBA controls access to the SDMA peripherals. It supports
shared peripheral ownership and access rights to an owned
peripheral.
Sony/Philips digital transceiver interface
The SSI is a full-duplex serial port that allows the processor
connected to it to communicate with a variety of serial protocols,
including the Freescale Semiconductor SPI standard and the I2C
sound (I2S) bus standard. The SSIs interface to the AUDMUX for
flexible audio routing.
Each UART provides serial communication capability with external
devices through an RS-232 cable using the standard RS-232
non-return-to-zero (NRZ) encoding format. Each module transmits
and receives characters containing either 7 or 8 bits
(program-selectable). Each UART can also provide low-speed IrDA
compatibility through the use of external circuitry that converts
infrared signals to electrical signals (for reception) or transforms
electrical signals to signals that drive an infrared LED (for
transmission).
i.MX35 Applications Processors for Automotive Products, Rev. 10
Freescale Semiconductor
11

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