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PDF LG128643-QFDWH6V Data sheet ( Hoja de datos )

Número de pieza LG128643-QFDWH6V
Descripción LCD Module
Fabricantes ETC 
Logotipo ETC Logotipo



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No Preview Available ! LG128643-QFDWH6V Hoja de datos, Descripción, Manual

LCD Module Specification
Model No.: LG128643-SMDWH6V
LG128643-SFDWH6V
LG128643-BMDWH6V
LG128643-LMDWH6V
LG128643-FMDWH6V
LG128643-FFDWH6V
LG128643-QFDWH6V
Table of Contents
1. BASIC SPECIFICATIONS ····························································· 2
2. ABSOLUTE MAXIMUM RATINGS ················································ 3
3. ELECTRICAL CHARACTERISTICS ············································· 4
4. OPERATING PRINCIPLES & METHODS ···································· 7
5. DISPLAY CONTROL INSTRUCTIONS ······································ 10
6. DISPLAY DATA RAM ADDRESS MAP ······································ 13
7. CONNECTION WITH 8051 FAMILY MPU ·································· 14
8. ELECTRO-OPTICAL CHARACTERISTICS ································ 15
9. DIMENSIONAL OUTLINE ···························································· 16
10. LCD MODULE NUMBERING SYSTEM ······································ 17
11. PRECAUTIONS FOR USE OF LCD MODULE ··························· 18
RECORD OF REVISION
Rev.
Date
Page
0.1 2007/11/01
--
0.2 2010/03/25
2
0.3 2010/10/18
2
Item
Description
-- New release
1.1 Add QFDWH6V mode
1.1 Add SMDWH6V mode

1 page




LG128643-QFDWH6V pdf
E
R/W
CS1, CS2
RS
DB0-DB7
E
R/W
CS1, CS2
RS
DB0-DB7
LG128643-xxDWH6V Rev 0.3
tC
t WL
-5-
tR
t ASU
t WH
tF
t AH
t ASU
t AH
t DSU
t DSU
MPU Write Timing
tC
tWL
tR tWH tF
t ASU
tASU
t AH
t AH
t D t DHR
MPU Read Timing

5 Page





LG128643-QFDWH6V arduino
LG128643-xxDWH6V Rev 0.3
- 11 -
5.1 Display On/Off
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 1 1 1 1 1D
The display data appears when D is 1 and disappears when D is 0.
Though the data is not on the screen with D=0, it remains in the display data RAM.
Therefore, you can make it appear by changing D=0 into D=1.
5.2 Set Address (Y Address)
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0
Y address (AC0-AC5) of the display data RAM is set in the Y address counter.
The address is set by instruction and increased by 1 automatically by read or write
operations of display data.
5.3 Set Page (X Address)
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 1 0 1 1 1 AC2 AC1 AC0
X address (AC0-AC2) of the display data RAM is set in the X address register.
Writing or reading to or from MPU is executed in this specified page until the next page is
set.
5.4 Display Start Line (Z Address)
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 1 1 AC5 AC4 AC3 AC2 AC1 AC0
Z address (AC0-AC5) of the display data RAM is set in the display start line register and
displayed at the top of the screen.

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