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PDF M34508G4GP Data sheet ( Hoja de datos )
| Número de pieza | M34508G4GP | |
| Descripción | SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER | |
| Fabricantes | Renesas | |
| Logotipo |  |
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4508 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
REJ03B0148-0103
Rev.1.03
2009.07.27
DESCRIPTION
The 4508 Group is a 4-bit single-chip microcomputer designed with
CMOS technology. Its CPU is that of the 4500 series using a simple,
high-speed instruction set. The computer is equipped with two 8-bit
timers (each timer has two reload registers), interrupts, 10-bit A/D
converter, Serial interface and oscillation circuit switch function.
FEATURES
● Minimum instruction execution time .................................. 0.5 µs
(at 6 MHz oscillation frequency, in through-mode)
● Supply voltage .......................................................... 1.8 V to 5.5 V
(It depends on operation source clock, oscillation frequency and
operating mode.)
● Timers
Timer 1 ................................. 8-bit timer with two reload registers
Timer 2 ................................. 8-bit timer with two reload registers
● Interrupt ........................................................................ 5 sources
● Key-on wakeup function pins ................................................... 12
● Input/Output port ...................................................................... 14
●A/D converter
10-bit successive comparison method ........................ 4 channel
● Serial intereface ............................................................. 8-bit ✕ 1
● Voltage drop detection circuit (only for H version)
Reset occurrence .................................... Typ. 2.6 V (Ta = 25 °C)
Reset release .......................................... Typ. 2.7 V (Ta = 25 °C)
●Power-on reset circuit (only for H version)
● Watchdog timer
●Clock generating circuit (on-chip oscillator/ceramic resonator/RC
oscillation)
●LED drive directly enabled (port D)
APPLICATION
Electrical household appliance, consumer electronic products, office
automation equipment, etc.
Part number
M34508G4FP (Note)
M34508G4-XXXFP
M34508G4HFP (Note)
M34508G4H-XXXFP
M34508G4GP (Note)
M34508G4-XXXGP
M34508G4HGP (Note)
M34508G4H-XXXGP
Note: Shipped in blank
PIN CONFIGURATION
ROM (PROM) size
(✕ 10 bits)
4096 words
4096 words
4096 words
4096 words
4096 words
4096 words
4096 words
4096 words
RAM size
(✕ 4 bits)
256 words
256 words
256 words
256 words
256 words
256 words
256 words
256 words
Package
PRSP0020DA-A
PRSP0020DA-A
PRSP0020DA-A
PRSP0020DA-A
PLSP0020JB-A
PLSP0020JB-A
PLSP0020JB-A
PLSP0020JB-A
ROM type
QzROM
QzROM
QzROM
QzROM
QzROM
QzROM
QzROM
QzROM
VDD
VSS
XIN
XOUT
CNVSS
RESET
P21/AIN1
P20/AIN0
D3/AIN5
D2/AIN4
1 20 P00/SIN
2 19 P01/SOUT
3 18 P02/SCK
4 17 P03
5 16 P10
6 15 P11/CNTR1
7 14 P12/CNTR0
8 13 P13/INT
9 12 D0
10 11 D1
Outline FP: PRSP0020DA-A (20P2N-A)
GP: PLSP0020JB-A (20P2F-A)
Pin configuration (top view) (4508 Group)
Rev.1.03 2009.07.27 page 1 of 140
REJ03B0148-0103
1 page  
4508 Group
MULTIFUNCTION
Pin
P00
P01
P02
P11
P12
P13
Multifunction
SIN
SOUT
SCK
CNTR1
CNTR0
INT
Pin
SIN
SOUT
SCK
CNTR1
CNTR0
INT
Multifunction
P00
P01
P02
P11
P12
P13
Pin
P20
P21
D2
D3
Multifunction
AIN0
AIN1
AIN4
AIN5
Pin
AIN0
AIN1
AIN4
AIN5
Multifunction
P20
P21
D2
D3
Notes 1: Pins except above have just single function.
2: The input/output of P00 can be used even when SIN is used. Be careful when using inputs of both SIN and P00 since the input threshold value of SIN pin
is different from that of port P00.
3: The input of P01 can be used even when SOUT is used.
4: The input of P02 can be used even when SCK is used. Be careful when using inputs of both SCK and P02 since the input threshold value of SCK pin is
different from that of port P02.
5: The input of P11 can be used even when CNTR1 (output) is selected.
The input/output of P11 can be used even when CNTR1 (input) is selected. Be careful when using inputs of both CNTR1 and P11 since the input thresh-
old value of CNTR1 pin is different from that of port P11.
6: The input of P12 can be used even when CNTR0 (output) is selected.
The input/output of P12 can be used even when CNTR0 (input) is selected. Be careful when using inputs of both CNTR0 and P12 since the input thresh-
old value of CNTR0 pin is different from that of port P12.
7: The input/output of P13 can be used even when INT is used. Be careful when using inputs of both INT and P13 since the input threshold value of INT
pin is different from that of port P13.
8: The input/output of P20, P21, D2, D3 can be used even when AIN0, AIN1, AIN4, AIN5 are used.
PORT FUNCTION
Port Pin
Port D D0, D1
D2/AIN4
D3/AIN5
Port P0 P00/SIN, P01/SOUT,
P02/SCK, P03
Port P1 P10, P11/CNTR1,
P12/CNT0,
P13/INT
Port P2 P20/AIN0
P21/AIN1
Input
Output
I/O
(4)
I/O
(4)
I/O
(4)
I/O
(2)
Output structure
N-channel open-drain/
CMOS
N-channel open-drain/
CMOS
N-channel open-drain/
CMOS
N-channel open-drain/
CMOS
I/O Control
Control
unit instructions registers
Remark
1 SD, RD
FR3
SZD, CLD
Programmable output structure selection
function
FR3, PU2
K2
Q1
Programmable pull-up function
Programmable key-on wakeup function
Programmable output structure selection
function
4 OP0A
IAP0
FR0, PU0
K0
J1
Programmable pull-up function
Programmable key-on wakeup function
Programmable output structure selection
function
4 OP1A
IAP1
FR1, PU1
K1, L1, I1
W1, W2
W5, W6
Programmable pull-up function
Programmable key-on wakeup function
Programmable output structure selection
function
2 OP2A
IAP2
FR2, PU2
Q1
K2
Programmable pull-up function
Programmable key-on wakeup function
Programmable output structure selection
function
Rev.1.03 2009.07.29 page 5 of 140
REJ03B0148-0103
5 Page 
4508 Group
Key-on
wakeup
input
L13
0 Level detection circuit
1 Edge detection circuit
IAP1 instruction
Register A
A2
L12
0
1
FR12
A2
OP1A instruction
D
TQ
W53
0
PWM1 1
Clock (input) for
timer 2 event count
W50
0
1
K12
PU12
(Note 1)
P12/CNTR0(Note 2)
(Note 1)
W20
W21
Key-on
wakeup
input
L13
0
1
Level detection circuit
Edge detection circuit
L12
0
1
IAP1 instruction
Register A
A3
FR13
K13
A3 D
OP1A instruction T Q
External 0 interrupt
Key-on wakeup input
Timer 1 count start synchronous circuit input
(Notes 3, 4)
External 0 interrupt circuit
PU13
(Note 1)
P13/INT(Note 2)
(Note 1)
Notes 1:
This symbol represents a parasitic diode on the port.
2: Applied potential to these ports must be VDD or less.
3: As for details, refer to the external interrupt structure.
4: The threshold value of port input is different from that of external interrupt input.
Port block diagram (4)
Rev.1.03 2009.07.29 page 11 of 140
REJ03B0148-0103
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet M34508G4GP.PDF ] | |
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