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PDF CAT25CXXX Data sheet ( Hoja de datos )

Número de pieza CAT25CXXX
Descripción Supervisory Circuits with SPI Serial E2PROM/ Precision Reset Controller and Watchdog Timer
Fabricantes Catalyst Semiconductor 
Logotipo Catalyst Semiconductor Logotipo



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Advanced
CAT25CXXX
Supervisory Circuits with SPI Serial E2PROM, Precision Reset Controller and Watchdog Timer
FEATURES
s 10 MHz SPI Compatible
s 1.8 to 6.0 Volt Operation
s Hardware and Software Protection
s Zero Standby Current
s Low Power CMOS Technology
s SPI Modes (0,0 &1,1)
s Commercial, Industrial and Automotive
Temperature Ranges
s Active High or Low Reset Outputs
– Precision Power Supply Voltage Monitoring
– 5V, 3.3V, 3V and 1.8V Options
DESCRIPTION
The CAT25CXXX is a single chip solution to three
popular functions of EEPROM Memory, precision reset
controller and watchdog timer. The EEPROM Memory is
a 2K/4K/8K/16K/32K-Bit SPI Serial CMOS E2PROM
internally organized as 256x8/512x8/1024x8/2048x8/
4096x8 bits. Catalyst’s advanced CMOS Technology
substantially reduces device power requirements. The
2K/4K devices feature a 16-byte page write buffer. The
8K/16K/32K devices feature a 32-byte page write
buffer.The device operates via the SPI bus serial inter-
face and is enabled though a Chip Select (CS). In
s Watchdog Timer on CS
s 1,000,000 Program/Erase Cycles
s 100 Year Data Retention
s Self-Timed Write Cycle
s 8-Pin DIP/SOIC, 16-Pin SOIC and 14-Pin TSSOP
s Page Write Buffer
s Block Write Protection
– Protect 1/4, 1/2 or all of E2PROM Array
s Programmable Watchdog Timer
s Built-in inadvertent Write Protection
– VCC Lock Out
addition to the Chip Select, the clock input (SCK), data
in (SI) and data out (SO) are required to access the
device. The reset function of the 25CXXX protects the
system during brown out and power up/down condtions.
During system failure the watchdog timer feature pro-
tects the microcontroller with a reset signal. The
CAT25CXXX is designed with software and hardware
write protection features including Block Lock protec-
tion. The device is available in 8-pin DIP, 8-pin SOIC, 16-
pin SOIC and 14-pin TSSOP packages.
PIN CONFIGURATION
TSSOP Package (U14)
SOIC Package (S16)
SOIC Package (S)
DIP Package (P)
CS 1
SO 2
NC 3
NC 4
NC 5
WP 6
VSS 7
14 VCC
CS
13 RESET/RESET SO
12 NC
NC
11 NC
10 NC
9 SCK
8 SI
NC
NC
NC
WP
VSS
1
2
3
4
5
6
7
8
16 VCC
CS 1
15 RESET/RESET SO 2
14 NC
WP 3
13 NC
VSS 4
12 NC
11 NC
10 SCK
9 SI
8 VCC
CS 1
7 RESET/RESET SO 2
6 SCK
WP 3
5 SI
VSS 4
8 VCC
7 RESET/RESET
6 SCK
5 SI
© 1998 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
9-95

1 page




CAT25CXXX pdf
Advanced
CAT25CXXX
FUNCTIONAL DESCRIPTION
The CAT25CXXX supports the SPI bus data transmis-
sion protocol. The synchronous Serial Peripheral Inter-
face (SPI) helps the CAT25CXXX to interface directly
with many of today’s popular microcontrollers. The
CAT25CXXX contains an 8-bit instruction register. (The
instruction set and the operation codes are detailed in
the instruction set table)
After the device is selected with CS going low, the first
byte will be received. The part is accessed via the SI pin,
with data being clocked in on the rising edge of SCK.
The first byte contains one of the six op-codes that define
the operation to be performed.
PIN DESCRIPTION
SI: Serial Input
SI is the serial data input pin. This pin is used to input all
opcodes, byte addresses, and data to be written to the
25CXXX. Input data is latched on the rising edge of the
serial clock.
SO: Serial Output
SO is the serial data output pin. This pin is used to
transfer data out of the 25CXXX. During a read cycle,
data is shifted out on the falling edge of the serial clock.
SCK: Serial Clock
SCK is the serial clock pin. This pin is used to synchro-
nize the communication between the microcontroller
and the 25CXXX. Opcodes, byte addresses, or data
present on the SI pin are latched on the rising edge of the
SCK. Data on the SO pin is updated on the falling edge
of the SCK.
RESET/RESET: RESET I/O
These are open drain pins and can be used as reset
trigger inputs. By forcing a reset condition on the pins the
device will initiate and maintain a reset condition. RE-
SET pin must be connected through a pull-down and
RESET pin must be connected through a pull-up device.
CS: Chip Select
CS is the Chip select pin. CS low enables the CAT25CXXX
and CS high disables the CAT25CXXX. CS high takes
the SO output pin to high impedance and forces the
devices into a Standby Mode (unless an internal write
operation is underway) The CAT25CXXX draws ZERO
current in the Standby mode. A high to low transition on
CS is required prior to any sequence being initiated. A
low to high transition on CS after a valid write sequence
is what initiates an internal write cycle.
WP: Write Protect
WP is the Write Protect pin. The Write Protect pin will
allow normal read/write operations when held high.
When WP is tied low and the WPEN bit in the status
register is set to “1”, all write operations to the status
register are inhibited. WP going low while CS is still low
will interrupt a write to the status register. If the internal
write cycle has already been initiated, WP going low will
have no effect on any write operation to the status
register. The WP pin function is blocked when the WPEN
bit is set to 0.
INSTRUCTION SET
Instruction
Opcode
WREN
0000 0110
WRDI
0000 0100
RDSR
0000 0101
WRSR
READ
WRITE
0000 0001
0000 X011(1)
0000 X010(1)
Note:
(1) X=O for 25C02X/08X/16X/32X. X=A8 for 25C04X
STATUS REGISTER
7
WPEN
6
X
5
WD1
4
WD0
3
BP1
9-99
Operation
Enable Write Operations
Disable Write Operations
Read Status Register
Write Status Register
Read Data from Memory
Write Data to Memory
2
BP0
1
WEL
0
RDY
Stock No. 21085-01 4/98

5 Page





CAT25CXXX arduino
Advanced
RESET CIRCUIT CHARACTERISTICS
Symbol
tGLITCH
VRT
VOLRS
VOHRS
VTH
tPURST
tRPD
VRVALID
Parameter
Min. Max.
Glitch Reject Pulse Width
100
Reset Threshold Hystersis
15
Reset Output Low Voltage (IOLRS=1mA)
0.4
Reset Output High Voltage
Vcc-0.75
Reset Threshold (Vcc=5V)
(25CXXX-45)
4.50 4.75
Reset Threshold (Vcc=5V)
(25CXXX-42)
4.25 4.50
Reset Threshold (Vcc=3.3V)
(25CXXX-30)
3.00 3.15
Reset Threshold (Vcc=3.3V)
(25CXXX-28)
2.85 3.00
Reset Threshold (Vcc=3V)
(25CXXX-25)
2.55 2.70
Reset Threshold (Vcc=1.8V)
(25CXXX-17)
1.70 1.80
Power-Up Reset Timeout
130 270
VTH to RESET Output Delay
5
RESET Output Valid
1
Units
ns
mV
V
V
V
ms
µs
V
CAT25CXXX
Figure 9. RESET Output Timing
VTH
VRVALID
VCC
t
GLITCH
tPURST
t RPD
tPURST
RESET
t RPD
RESET
9-105
Stock No. 21085-01 4/98

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