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PDF CAT25C04 Data sheet ( Hoja de datos )

Número de pieza CAT25C04
Descripción 1K/2K/4K/8K/16K SPI Serial CMOS E2PROM
Fabricantes Catalyst Semiconductor 
Logotipo Catalyst Semiconductor Logotipo



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Advanced Information
CAT25C01/02/04/08/16
1K/2K/4K/8K/16K SPI Serial CMOS E2PROM
FEATURES
s 10 MHz SPI Compatible
s 1.8 to 6.0 Volt Operation
s Hardware and Software Protection
s Zero Standby Current
s Low Power CMOS Technology
s SPI Modes (0,0 & 1,1)
s Commercial, Industrial and Automotive
Temperature Ranges
DESCRIPTION
s 1,000,000 Program/Erase Cycles
s 100 Year Data Retention
s Self-Timed Write Cycle
s 8-Pin DIP/SOIC, 8/14-Pin TSSOP and 8-Pin MSOP
s 16/32-Byte Page Write Buffer
s Block Write Protection
– Protect 1/4, 1/2 or all of E2PROM Array
The CAT25C01/02/04/08/16 is a 1K/2K/4K/8K/16K Bit
SPI Serial CMOS E2PROM internally organized as
128x8/256x8/512x8/1024x8/2048x8 bits. Catalyst’s ad-
vanced CMOS Technology substantially reduces de-
vice power requirements. The CAT25C01/02/04 fea-
tures a 16-byte page write buffer. The 25C08/16 fea-
tures a 32-byte page write buffer.The device operates
via the SPI bus serial interface and is enabled though a
Chip Select (CS). In addition to the Chip Select, the clock
PIN CONFIGURATION
TSSOP Package (U14) SOIC Package (S)
input (SCK), data in (SI) and data out (SO) are required
to access the device. The HOLD pin may be used to
suspend any serial communication without resetting the
serial sequence. The CAT25C01/02/04/08/16 is de-
signed with software and hardware write protection
features including Block Write protection. The device is
available in 8-pin DIP, 8-pin SOIC, 8-pin MSOP and 8/
14-pin TSSOP packages.
DIP Package (P)
TSSOP Package (U)
CS 1
SO 2
NC 3
NC 4
NC 5
WP 6
VSS 7
14 VCC
13 HOLD
12 NC
11 NC
10 NC
9 SCK
8 SI
PIN FUNCTIONS
CS
SO
WP
VSS
1
2
3
4
8 VCC
7 HOLD
6 SCK
5 SI
MSOP Package (R)*
CS 1
SO 2
WP 3
VSS 4
8 VCC
7 HOLD
6 SCK
5 SI
*CAT 25C01/02 only
CS
SO
WP
VSS
1
2
3
4
8 VCC
7 HOLD
6 SCK
5 SI
CS
SO
WP
VSS
BLOCK DIAGRAM
1
2
3
4
WORD ADDRESS
BUFFERS
8 VCC
7 HOLD
6 SCL
5 SI
SENSE AMPS
SHIFT REGISTERS
COLUMN
DECODERS
Pin Name
SO
SCK
WP
Function
Serial Data Output
Serial Clock
Write Protect
SO
SI
CS
WP
HOLD
SCK
I/O
CONTROL
SPI
CONTROL
LOGIC
XDEC
E2PROM
ARRAY
VCC
VSS
CS
SI
HOLD
NC
+1.8V to +6.0V Power Supply
Ground
Chip Select
Serial Data Input
Suspends Serial Input
No Connect
BLOCK
PROTECT
LOGIC
STATUS
REGISTER
DATA IN
STORAGE
HIGH VOLTAGE/
TIMING CONTROL
25C128 F02
© 1999 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 25067-00 5/00

1 page




CAT25C04 pdf
Advanced Information
CAT25C01/02/04/08/16
HOLD: Hold
HOLD is the HOLD pin. The HOLD pin is used to pause
transmission to the CAT25C01/02/04/08/16 while in the
middle of a serial sequence without having to re-transmit
entire sequence at a later time. To pause, HOLD must be
brought low while SCK is low. The SO pin is in a high
impedance state during the time the part is paused, and
transitions on the SI pins will be ignored. To resume
communication, HOLD is brought high, while SCK is low.
(HOLD should be held high any time this function is not
being used.) HOLD may be tied high directly to VCC or
tied to VCC through a resistor. Figure 9 illustrates hold
timing sequence.
STATUS REGISTER
The Status Register indicates the status of the device.
The RDY (Ready) bit indicates whether the CAT25C01/
02/04/08/16 is busy with a write operation. When set to
1 a write cycle is in progress and when set to 0 the device
indicates it is ready. This bit is read onlyThe WEL (Write
Enable) bit indicates the status of the write enable latch.
When set to 1, the device is in a Write Enable state and
when set to 0 the device is in a Write Disable state. The
WEL bit can only be set by the WREN instruction and can
be reset by the WRDI instruction.
STATUS REGISTER
765
WPEN PR_MODE SPI_MODE
4
X
3210
BP1
BP0
WEL
RDY
BLOCK PROTECTION BITS
Status Register Bits
BP1 BP0
00
01
10
11
Array Address
Protected
None
25C01: 60-7F
25C02: C0-FF
25C04: 180-1FF
25C08: 0300-03FF
25C16: 0600-07FF
25C01: 40-7F
25C02: 80-FF
25C04: 100-1FF
25C08: 0200-03FF
25C16: 0400-07FF
25C01: 00-7F
25C02: 00-FF
25C04: 000-1FF
25C08: 0000-03FF
25C16: 0000-07FF
Protection
No Protection
Quarter Array Protection
Half Array Protection
Full Array Protection
WRITE PROTECT ENABLE OPERATION
WPEN
0
0
1
1
X
X
WP
X
X
Low
Low
High
High
WEL
0
1
0
1
0
1
Protected
Blocks
Protected
Protected
Protected
Protected
Protected
Protected
Unprotected
Blocks
Protected
Writable
Protected
Writable
Protected
Writable
Status
Register
Protected
Writable
Protected
Protected
Protected
Writable
5 Doc. No. 25067-00 5/00

5 Page










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