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PDF QLx4600-SL30 Datasheet ( Hoja de datos )

Número de pieza QLx4600-SL30
Descripción Quad Lane Extender
Fabricantes Intersil 
Logotipo Intersil Logotipo
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QLx4600-SL30 datasheet

1 Page

QLx4600-SL30 pdf
QLx4600-SL30
Absolute Maximum Ratings
Supply Voltage (VDD to GND). . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 1.3V
Voltage at All Input Pins. . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD + 0.3V
ESD Rating at All Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV (HBM)
Thermal Information
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
46 Ld QFN Package (Notes 4, 5) . . . . . . . .
32
2.3
Operating Ambient Temperature Range . . . . . . . . . . . . . . . . .0°C to +70°C
Storage Ambient Temperature Range. . . . . . . . . . . . . . . . -55°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .see TB493
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Operating Conditions
PARAMETER
Supply Voltage
Operating Ambient
Temperature
Bit Rate
SYMBOL
VDD
TA
TEST CONDITIONS
NRZ data applied to any channel
MIN
(Note 7)
1.1
0
1.5
MAX
TYP (Note 7) UNIT
1.2 1.3
V
25 70 °C
6.25
Gb/s
Control Pin Characteristics Typical values are at VDD = 1.2V, TA = +25°C, and VIN = 800mVP-P, unless otherwise noted. VDD = 1.1V to
1.3V, TA = 0°C to +70°C.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 7)
MAX
TYP (Note 7)
UNIT NOTES
Input ‘LOW’ Logic Level
Input ‘HIGH’ Logic Level
Output ‘LOW’ Logic Level
Output ‘HIGH’ Logic Level
‘LOW’ Resistance State
VIL DI, CLK, ENB
VIH DI, CLK, ENB
VOL LOS[k], DO
VOH LOS[k], DO
CP[k][A,B,C]
0
750
0
1000
0
0
0
350 mV
VDD mV
250 mV
VDD mV
1 kΩ
6
‘MID’ Resistance State
CP[k][B,C]
22.5 25 27.5 kΩ
6
‘HIGH’ Resistance State
CP[k][A,B,C]
500 kΩ 6
Input Current
Current draw on digital pin, i.e., CP[k][A, B, C],
DI, CLK, ENB
30 100 µA
NOTE:
6. If four CP pins are tied together, the resistance values in this table should be divided by four.
Submit Document Feedback
5
FN6981.2
April 15, 2016

5 Page

QLx4600-SL30 arduino
QLx4600-SL30
Typical Performance Characteristics (Continued)
0
Channel 1
-5 Channel 2
Channel 3
-10 Channel 4
-15
-20
-25
-30
0 0.5 1 1.5 2 2.5 3 3.5
Frequency (GHz)
FIGURE 17. INPUT COMMON-MODE RETURN LOSS
4
0
Channel 1
-5 Channel 2
Channel 3
-10 Channel 4
-15
-20
-25
-30
0 0.5 1 1.5 2 2.5 3 3.5
Frequency (GHz)
FIGURE 18. OUTPUT COMMON-MODE RETURN LOSS
4
0
-5
-10
-15
-20
-25
Channel 1
Channel 2
-30 Channel 3
Channel 4
-35
0 0.5 1 1.5 2 2.5 3 3.5 4
Frequency (GHz)
FIGURE 19. INPUT DIFFERENTIAL RETURN LOSS
0
Channel 1
-5 Channel 2
Channel 3
-10 Channel 4
-15
-20
-25
-30
-35
0 0.5 1 1.5 2 2.5 3 3.5
Frequency (GHz)
FIGURE 20. OUTPUT DIFFERENTIAL RETURN LOSS
4
FIGURE 21. DIFFERENTIAL CROSSTALK BETWEEN ADJACENT INPUT
CHANNELS
NOTE:
18. Differential transmit amplitude = 1200mVP-P.
Submit Document Feedback 11
FIGURE 22. DIFFERENTIAL CROSSTALK BETWEEN ADJACENT INPUT
CHANNELS
FN6981.2
April 15, 2016

11 Page





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