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PDF THCV220 Data sheet ( Hoja de datos )
| Número de pieza | THCV220 | |
| Descripción | HS High-speed video data receiver | |
| Fabricantes | THine Electronics | |
| Logotipo |  |
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THCV220
V-by-One® HS High-speed video data receiver
General Description
THCV220 is designed to support video data
transmission between the host and display.
One high-speed lane can carry up to 32bit data and
3 bits of synchronizing signals at a pixel clock
frequency from 7.5MHz to 93MHz.
It has one high-speed data lane and, maximum
serial data rate is 3.75Gbps/lane.
Width Link
TTL Clock Freq.
24bit Si/So 10MHz to 125MHz
32bit Si/So 7.5MHz to 93MHz
Si/So : Single-in/Single-out,
Features
Color depth selectable: 24(8*3)/32(10*3)bit
Single Link
AC coupling for high speed lines
Wide Range Supply Voltage 2.3-3.6V
Package: 64 pin QFN
Wide frequency range
CDR requires no external freq. reference
Spread Spectrum Clocking tolerant
Up to 30kHz/0.5% (center spread)
V-by-One® HS standard Ver.1.4 compliant
AEC-Q100 ESD Protection
Block Diagram
RXp
RXn
HTPDN
LOCKN
BETOUT
AVCC
VCC
THCV220
Controls
LDO
R9-R0
G9-G0
B9-B0
CONT2,CONT1
HSYNC
VSYNC
DE
CLKOUT
COL
LFSEL
RF
PDN
OE
BET
LATEN
TTLDRV
CAPOUT
CAPINA
THCV220_Rev.2.20_E
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Functional Description
Functional Overview
With V-by-One® HS proprietary encoding scheme and CDR (Clock and Data Recovery) architecture,
THCV220 enable transmission of 8/10 bit RGB, 2bits of user-defined data (CONT), synchronizing signals
HSYNC, VSYNC, and DE by a pair cable with minimal external components.
THCV220 automatically extracts the clock from the incoming data streams and converts the serial data into
video data with DE being high or synchronizing data with DE being low, recognizing which type of serial data is
being sent by the transmitter. And it outputs the recovered data in the form of CMOS/TTL data.
THCV220 can operate for a wide range of a serial bit rate from 600Mbps to 3.75Gbps.
It does not need any external frequency reference, such as a crystal oscillator.
Internal Reference Output/Input Function (CAPOUT,CAPINA)
An internal regulator produces the 1.2V (CAPOUT). This 1.2V linear regulator can not supply any other
external loads. Bypass CAPOUT to GND with 2.2uF.
CAPINA supplies reference voltage for any internal analog circuit also. Bypass CAPINA to GND with 0.1uF
to remove high frequency noise. CAPOUT and CAPINA must be tied together.
Analog power supply AVCC is supposed to be stabilized with de-coupling capacitor and series noise filter (for
example, ferrite bead).
Power
Supply
THCV220
AVCC
CAPOUT
CAPINA
2.2uF
0.1uF
Figure 1. Connection of CAPOUT, CAPINA and Decoupling Capacitor
THCV220_Rev.2.20_E
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symbol
VIH
VIL
VOH
VOL
Parameter
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
CMOS Output buffer
Low Level Output Voltage
Open Drain Output buffer
Low Level Output Voltage
CMOS Output buffer
symbol
VRTH
VRTL
IRIH
IRIL
IRRIH
IRRIL
RRIN
Parameter
CML Differential Input High Threshold
CML Differential Input Low Threshold
CML Input Leak Current High
CML Input Leak Current Low
CML Input Current High
CML Input Current Low
CML Differential Input Resistance
symbol
IRCCW
IRCCS
Parameter
Receiver Supply Current
(Worst Case Pattern)
Receiver Power Down
Supply Current
conditions
I3
I3L
I3
I3L
TTLDRV=L,IOH=-2mA
TTLDRV=H,IOH=-4mA
IOL=2mA
TTLDRV=L, IOL=2mA
TTLDRV=H, IOL=4mA
min.
1.7
1.6
0
0
2.0
VCC=2.5±0.2V
typ.
max.
Unit
VCC
V
VCC
V
0.7 V
0.5 V
VCC
V
0.2
0.4 V
0.4
CML DC Specifications
Over recommended operating supply and temperature ranges unless otherwise specified.
conditions
min.
typ.
max.
Unit
50 mV
-50 mV
PDN=L, RXP/N=1.2V
±15 uA
PDN=L, RXP/N=GND
±15 uA
RXP/N=1.2V
1.6 mA
RXP/N=GND
-4.6
mA
80 100 120 Ω
Supply Currents
Over recommended operating supply and temperature ranges unless otherwise specified.
conditions
min.
typ.
max.
Unit
Cload=8pF
COL=L
170 mA
PDN=L
All Inputs =Fixed LorH
1.2 10 mA
THCV220_Rev.2.20_E
Copyright©2016 THine Electronics, Inc.
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11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet THCV220.PDF ] | |
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