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Número de pieza | THCS134 | |
Descripción | I/O Spreader | |
Fabricantes | THine Electronics | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de THCS134 (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
No Preview Available ! THCS134-TSSOP_Rev.1.02_E
THCS134
I/OSpreader TSSOP28
General Description
The THCS134 provides a function to serialize
multiple parallel signals into single-ended serial
line at least or to deserialize the data stream over
single-ended serial line or single differential pair
into multiple parallel signals.
This small number of transmission line simplifies
system configuration and reduces system cost
including cable width, connector size and pins
and PCB layout area.
The THCS134 is offered in 8bit/16bit parallel
IOs as host MPU interface. It can transfer 16bit
independent parallel signals to remote side by
only 1-line or 1-pair cable. Also, the THCS134
set as master device can control plural slave
devices by transmitting and receiving data that is
designated as a device address.
Transmitter, receiver or transceiver function can
be selected by pins.
Features
- No External Clock Required.
-8bit/16bit Parallel IOs to MPU.
- Uni-directional/Bi-directional Mode Selectable
- Single-ended/Differential Mode (noise tolerant)
Selectable
- AC Coupling Supported with Differential Mode
- Transmission Status Error Indicator Supported
(Line Cut Detection and Packet Error
Detection)
- Digital Filter Function.
- Power supply : 3.0 to 5.5V
- TSSOP 28-pin
- EU RoHS Compliant
Block Diagram
THCS134
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1 page THCS134-TSSOP_Rev.1.02_E
LVDS Input Output Differential Voltage
ION
VOC
IOP
ION
VOD
IOP
VID
Electrical Characteristics AC Characteristics (Reset Section)
Mark
Parameter
Condition
Min Typ Max Unit
Time from Reset (RSTN) Release to
tRST
Valid Input
-
100
--
us
(Note)
tWRST Reset (RSTN) Low Pulse Width
- 50 - - ns
Note : In AC coupling, tRST changes with the capacity to connect.
Timing Chart (Reset Section)
Reset signal (RSTN)
Reset input (RSTN)
Input data/Bi-direction
(DATA)
Output data (DATA)
tWRST
tRST
Valid data
Pull-down
Output Low
Valid data output
In the case of the mode F, output is controlled by signal of
output enable (OEN_L/OEN_U), a pull-down state is
continued until it sets signal of output enable to LOW.
Electrical Characteristics AC Characteristics (Serial Communication)
Mark
Item
Condition
fPSPLa
Serializer Input Sampling Frequency
(Uni-direction)
BID=L
fPSPLb
Serializer Input Sampling Frequency
(Bi-direction)
BID=H
tPSa
Time of Serializer Transmission (Uni-direction)
BID=L
tSPa Deserializer Output Renewal Time (Uni-direction)
BID=L
tPSb
Time of Serializer Transmission (Bi-direction)
BID=H
tSPb Deserializer Output Renewal Time (Bi-direction)
BID=H
fSTR
Serial Data Transmission Rate
-
Min Typ Max Unit
50 -
- kHz
30 -
- kHz
- - 18 us
- - 2 us
- - 14 us
- - 2 us
- 2.5 - MHz
Copyright©2015 THine Electronics, Inc.
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Connection Example (Mode E, F, G)
Mode E
DIN[7:0]
LEN_U
LEN_L
Latch
circuit
Serialize
Mode F
Deserialize
Selector
DOUT[7:0]
OEN_U
OEN_L
DIO[7:0]
LEN
OEN
Latch
Circuit
&
I/O
conversion
Serialize
&
Deserialize
Mode G
Mode D
Serialize
&
Deserialize
DOUT[7:0]
DIN[7:0]
・Latch Enable, Output Enable Truth Table
Mode E
LEN_U
LEN_L
Latch Enable Input
Lower 8bit is transmitted by sampling frequency
LL
(8bit through mode)
↑ H Upper 8bit input latch
H ↑ Lower 8bit input latch and 16bit data reception
H H Keep data
The rising edge of LEN_L is the trigger for sampling of upper and lower data.
OEN_U
L
L
H
H
OEN_L
L
H
L
H
Mode F
Output Enable Input
Output disable
(DATA pins are pulled down by 250k internally)
Upper 8bit Output enable
Lower 8bit Output enable
Output disable
(DATA pins are pulled down by 250k internally)
Copyright©2015 THine Electronics, Inc.
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11 Page |
Páginas | Total 19 Páginas | |
PDF Descargar | [ Datasheet THCS134.PDF ] |
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