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PDF XR17D154 Data sheet ( Hoja de datos )

Número de pieza XR17D154
Descripción UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
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No Preview Available ! XR17D154 Hoja de datos, Descripción, Manual

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AUGUST 2005
GENERAL DESCRIPTION
XR17D154
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
FEATURES
REV. 1.2.2
The XR17D1541 (D154) is a quad PCI Bus Universal
Asynchronous Receiver and Transmitter (UART) with
same package and pin-out as the Exar XR17C158,
XR17D158 and XR17C154. The device is designed
to meet today’s 32-bit PCI Bus and high bandwidth
requirement in communication systems. The global
interrupt source register provides a complete interrupt
status indication for all 4 channels to speed up
interrupt parsing. Each UART is independently
controlled and has its own 16C550 compatible 5G
register set, transmit and receive FIFOs of 64 bytes,
fully programmable transmit and receive FIFO trigger
levels, transmit and receive FIFO level counters,
automatic hardware flow control with programmable
hysteresis, automatic software (Xon/Xoff) flow
control, IrDA (Infrared Data Association) encoder/
decoder, 8 multi-purpose inputs/outputs and a 16-bit
general purpose timer/counter.
NOTE: 1 Covered by U.S. Patents #5,649,122, #5,949,787
APPLICATIONS
Universal Form Factor PCI Bus Add-in Card
Remote Access Servers
Ethernet Network to Serial Ports
Network Management
Factory Automation and Process Control
Point-of-Sale Systems
Multi-port RS-232/RS-422/RS-485 Cards
High Performance Quad PCI UART
Universal PCI Bus Buffers - Auto-sense 3.3V or 5V
Operation
32-bit PCI Bus 2.3 Target Signalling Compliance
A Global Interrupt Source Register for all 4 UARTs
Data Transfer in Byte, Word and Double-word
Data Read/Write Burst Operation
Each UART is independently controlled with:
16C550 Compatible 5G Register Set
64-byte Transmit and Receive FIFOs
Transmit and Receive FIFO Level Counters
Automatic RTS/CTS or DTR/DSR Flow Control
Automatic Xon/Xoff Software Flow Control
Automatic RS485 Half-duplex Control Output
with Selectable Turn-around Delay
Infrared (IrDA 1.0) Data Encoder/Decoder
Programmable Data Rate with Prescaler
Up to 6.25 Mbps Serial Data Rate at 8X
Eight Multi-Purpose Inputs/outputs
General Purpose 16-bit Timer/Counter
Sleep Mode with Automatic Wake-up
EEPROM Interface for PCI Configuration
Same package and pin-out as the XR17D158,
XR17C158 and XR17C154 (20x20x1.4mm 144-
LQFP)
FIGURE 1. BLOCK DIAGRAM
3.3V or 5V
(PCI VI/O
Power Supply)
CLK (33MHz)
RST#
AD[31:0]
C/BE[3:0]#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
INTA#
IDSEL
PERR#
SERR#
PAR
EECK
EEDI
EEDO
EECS
ENIR
PCI Local
Bus
Interface
Device
Configuration
Registers
Configuration
Space
Registers
EEPROM
Interface
16-bit
Timer/Counter
UART Channel 0
UART
Regs
BRG
64 Byte TX FIFO
TX & RX
IR
ENDEC
64 Byte RX FIFO
UART Channel 1
UART Channel 2
UART Channel 3
M u lti-p u r.p o s e
Inputs/Outputs
Crystal Osc/Buffer
VCC (Core
Logic)
GND
TX0, RX0, DTR0#,
DSR0#, RTS0#,
CTS0#, CD0#, RI0#
TX3, RX3, DTR3#,
DSR3#, RTS3#,
CTS3#, CD3#, RI3#
MPIO0- MPIO7
XTAL1
XTAL2
TMRCK
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com

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XR17D154 pdf
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REV. 1.2.2
PIN DESCRIPTIONS
NAME
MPIO1
PIN #
107
MPIO2
74
MPIO3
73
MPIO4
68
MPIO5
67
MPIO6
66
MPIO7
65
EECK
116
EECS
115
EEDI
EEDO
XTAL1
XTAL2
TMRCK
ENIR
114
113
110
109
69
70
TEST#
VCC
111
64, 90, 112
XR17D154
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
TYPE
DESCRIPTION
I/O Multi-purpose input/output 1. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
I/O Multi-purpose input/output 2. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
I/O Multi-purpose input/output 3. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
I/O Multi-purpose input/output 4. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
I/O Multi-purpose input/output 5. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
I/O Multi-purpose input/output 6. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
I/O Multi-purpose input/output 7. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
O Serial clock to EEPROM. An internal clock of CLK divide by 256 is used for
reading the vendor and sub-vendor ID and model number during power up or
reset. However, it can be manually clocked thru the Configuration Register
REGB.
O Chip select to a EEPROM device like 93C46. It is manually selectable thru
the Configuration Register REGB. Requires a pull-up 4.7Kresistor for
external sensing of EEPROM during power up. See DAN112 for further
details.
O Write data to EEPROM device. It is manually accessible thru the Configura-
tion Register REGB. The D154 auto-configuration register interface logic
uses the 16-bit format.
I Read data from EEPROM device. It is manually accessible thru the Configu-
ration Register REGB.
I Crystal of up to 24MHz or external clock input of up to 50MHz for data rates
up to 6.25Mbps at 5V and 8X sampling. See AC Characterization table. Cau-
tion: this input is not 5V tolerant at 3.3V.
O Crystal or buffered clock output.
I 16-bit timer/counter external clock input.
I Infrared mode enable (active high). This pin is sampled during power up, fol-
lowing a hardware reset (RST#) or soft-reset (register RESET). It can be
used to start up all 4 UARTs in the infrared mode. The sampled logic state is
transferred to MCR bit-6 in the UART. Software can override this pin thereaf-
ter and enable or disable it.
I Factory Test. Connect to VCC for normal operation.
PWR
5V or 3.3V power supply for the core logic. This power supply determines
the VOH level of the non-PCI bus interface outputs. Note that VCC VIO for
normal device operation and see Table 1 for valid combinations of VCC and
VIO. SEE”APPLICATION EXAMPLES” ON PAGE 8. However, VCC must
equal VIO if sleep mode is used. See Sleep Mode section on page 19.
5

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XR17D154 arduino
xr
REV. 1.2.2
XR17D154
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
ADDRESS
BITS
0x00
0x04
31:16
15:0
31:28
27
26:25
24
23
22:16
15:9,7,
5,4,3,2
8
6
1
0
0x08
0x0C
0x10
0x14
0x18h
0x1C
0x20
0x24
0x28
0x2C
31:8
7:0
31:24
23:16
15:8
7:0
31:11
10:0
31:0
31:0
31:0
31:0
31:0
31:0
31:16
TABLE 2: PCI LOCAL BUS CONFIGURATION SPACE REGISTERS
TYPE
DESCRIPTION
RWR1 Device ID (Exar device ID number or from EEPROM)
RWR1 Vendor ID (Exar ID or from EEPROM) specified by PCISIG
RO Status bits (error reporting bits)
R-Reset Target Abort. Set whenever D154 terminates with a target abort.
RO DEVSEL# timing.
RO Unimplemented bus master error reporting bit
RO Fast back to back transactions are supported
RO Reserved Status bits
RO Command bits (reserved)
RESET VALUE
(HEX)
0x0154
0x13A8
0000
0
00
0
1
000 0000
0x0000
WO
WO
RWR
RO
RO
RO
RO
RO
RO
RO
RW
RO
RO
RO
RO
RO
RO
RO
RWR1
SERR# driver enable. Logic 1=enable driver and 0=disable
driver
0
Parity error enable. Logic 1=respond to parity error and 0=ignore
0
Command controls a device’s response to mem space accesses:
0=disable mem space accesses, 1=enable mem space accesses
0
Command controls a device’s response to I/O space accesses:
0 = disable I/O space accesses 1 = enable I/O space accesses
0
Class Code (Simple 550 Communication Controller).
0x070002
Revision ID (Exar device revision number)
Current Rev. value
BIST (Built-in Self Test)
0x00
Header Type (a single function device with one BAR)
0x00
Unimplemented Latency Timer (needed only for bus master)
0x00
Unimplemented Cache Line Size
0x00
Memory Base Address Register (BAR)
0x00
Claims a 2K address space for the memory mapped UARTs
0xX000
Unimplemented Base Address Register (returns zeros)
0x00000000
Unimplemented Base Address Register (returns zeros)
0x00000000
Unimplemented Base Address Register (returns zeros)
0x00000000
Unimplemented Base Address Register (returns zeros)
0x00000000
Unimplemented Base Address Register (returns zeros)
0x00000000
Reserved
0x00000000
Subsystem ID (write from external EEPROM by customer)
0x0000
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