PDF XR18W753 Data sheet ( Hoja de datos )

Número de pieza	XR18W753
Descripción	SINGLE CHIP 868MHZ TO 956MHZ RF TRANSCEIVER
Fabricantes	Exar
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No Preview Available ! XR18W753 SINGLE CHIP 868MHZ TO 956MHZ RF TRANSCEIVER MARCH 2008 REV. 1.0.0 GENERAL DESCRIPTION The XR18W753 is a low-power, single-chip RF transceiver designed to operate in license-free European 868 MHz SRD, North American / Australian 915 MHz ISM bands. Digital I/Q modulation, demodulation and direct sequence spread spectrum techniques were employed to provide robust data transmission in signal congested RF environments. The device provides extensive hardware support for packet handling such as frame timing, data buffering, RSSI/ED/LQI for clear channel assessment, and FCS and CRC hardware for error detection. TX output power is programmable from -24 dBm to 0 dBm with 100 Kbps and 250 Kbps O-QPSK data supported. APPLICATIONS • Industrial/Home automation, monitoring and control • Point of sales and data collection terminals • Entertainment, game, toy, robot, and remote control • Active RFID, asset tracking and keyless entry • Lighting, HVAC energy management • Automatic meter reading • Wireless sensor and telemetry networks FEATURES • 2.2 to 3.6 Volt Operation • 868 MHz to 956 MHz • Direct-Sequence-Spread-Spectrum Transceiver • Direct-up-conversion I/Q modulator • Low-IF I/Q digital receiver • Superior blocking/desensitization performance • RSSI / ED / LQI for clear channel assessment • FCS computation and CRC for error detection • Low BOM cost and ease of production • I2C Interface to data buffer and internal registers • Fully integrated loop filter with few external components needed (crystal, capacitors, antenna and matching networks) • Programmable TX output power in 3 dB steps • Receiver sensitivity of -94 dBm at 100 Kbps • Supports O-QPSK 100 Kbps and 250 Kbps data • Industrial temperature (-40 to +85 oC) • 48-pin QFN package FIGURE 1. RF TRANSCEIVER BLOCK DIAGRAM 16MHz XTAL VREG_CLK_EN 16MHz CLK SCL SDA IRQ# CLOCK GENERATION Voltage Regulator DATA ACCESS CONTROLLER TX DATA BUFFER RX DATA BUFFER ModemControl &Status CRC P L M E cca_ed_ready pck_tx_ready pck_received plme_ready Digital Modem RF Modem Controller Matching Network Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com 1 page REV. 1.0.0 XR18W753 SINGLE CHIP 868MHZ TO 956MHZ RF TRANSCEIVER NAME PIN TYPE DESCRIPTION TEST2 31 Digital I Factory Test Mode. For normal operation, this pin should be connected to GND. A2 32 Digital I I2C Address bit-2 A3 33 Digital I I2C Address bit-3. This address line should be connected to GND. CLK_OUT+ 34 Digital O 16 MHz LVDS digital clock outputs. Connect pin 35 to ground for CLK_OUT- 35 Digital O CMOS clock output. MODEM_RESET 36 Digital I Digital modem reset (active high, level sensitive). VREG_CLK_EN 37 Digital I Voltage Regulator and crystal oscillator enable (active high, level sensi- tive) AVDD19 38 Power I VDD (1.9V ± 0.1V) for crystal oscillator and clock divider. XTAL1 39 Analog I 16MHz crystal input or external clock input. Based on typical PCB stray capacitance, a 27 pF capacitor to GND is recommended. XTAL2 40 Analog I Crystal output, 27 pF capacitor to GND is recommended. If an external clock is used at XTAL1, this input should be left unconnected. AGND 41 Ground Ground for crystal oscillator and buffers. DVDD_OUT 42 Power O Decoupling pin for digital VDD, 10 nF capacitor to GND recommended. DVDD 43 Power I Digital Power Supply, DVDD = 2.2 - 3.6V. DVDD and AVDD should use the same power supply. 100nF capacitor to GND recommended. AVDD 44 Power I Analog Power Supply, AVDD = 2.2 - 3.6V. DVDD and AVDD should use the same power supply. 100nF capacitor to GND recommended. AVDD_OUT 45 Power O 1.9V stabilized analog VDD output. This output should be connected to all AVDD19 pins. 1uF ceramic capacitor to GND recommended. AVDD19 46 Power I Analog VDD (1.9V ± 0.1V) for ADC and DAC. AVDD19 47 Power I Analog VDD (1.9V ± 0.1V) for ADC. AVDD19 48 Power I Analog VDD (1.9V ± 0.1V) for IF strip, TX mixers and both I/Q dividers. PADDLE 49 Ground The center pad on the backside of the 48-QFN package is metallic and is not electrically connected to anything inside the device. It must be soldered on to the PCB and may be optionally connected to GND on the PCB. The thermal pad size on the PCB should be the approximate size of this center pad and should be solder mask defined. The solder mask opening should be at least 0.0025" inwards from the edge of the PCB thermal pad. Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain. 5 5 Page REV. 1.0.0 3.0 I2C MEMORY MAP 3.1 REGISTERS OVERVIEW ADDRESS REGISTER NAME 0x00 READ_SUBADDDRESS 0x01 RX_FIFO 0x02 TX_FIFO 0x03 FIFO_CONTROL 0x04 INT_MASKING 0x05 INT_STATUS 0x06-0xF Reserved 0x10 MODEM_REQUEST 0x11 MODEM_CONF_0 0x12 MODEM_CONF_1 0x13 ED_AV_TIME 0x14 MODEM_ED 0x15 MODEM_LQI 0x16-0x1F Reserved 0x20 CHANNEL 0x21 TX_POWER 0x22 - 0x26 Reserved 0x27 AGC_ACT_VALUE 0x28 Reserved 0x29 SLICER_LEVEL 0x2A-0x2D Reserved 0x2E ED_THRES 0x2F - 0x30 RSSI_ACT_VALUE_0, 1 0x31-0x4F Reserved 0x50 TEST_0 0x51 TEST_1 0x52 TEST_2 0x53 TEST_3 0x54 - 0x7D Reserved 0x7E CHIP_ID 0x7F REV_ID Reserved registers are for internal use only. XR18W753 SINGLE CHIP 868MHZ TO 956MHZ RF TRANSCEIVER RESET VALUE 0x00 - 0x00 0x00 0x08 - - 0x00 - - 0x00 - - - 0x01 0x00 - - - - - 0x00 - - - - - - - 0xB1 0x03 TYPE R/W R W R/W R/W R - R/W R R R/W R R - R/W R/W - R - R - R/W R - R/W R/W R/W R/W - R R COMMENTS Interrupt masking Interrupt status Frequency channel selection Transmit output power Frequency Offset (2’s complement) Two’s complement number For normal operation, initialize to 0xD1 For normal operation, initialize to 0x19 For normal operation, initialize to 0x82 For normal operation, initialize to 0x00 11 11 Page

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