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PDF MAT14 Data sheet ( Hoja de datos )
| Número de pieza | MAT14 | |
| Descripción | Matched Monolithic Quad Transistor | |
| Fabricantes | Analog Devices | |
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Matched Monolithic Quad Transistor
MAT14
FEATURES
Low offset voltage: 400 µV maximum
High current gain: 300 minimum
Excellent current gain match: 4% maximum
Low voltage noise density at 100 Hz, 1 mA
3 nV/√Hz maximum
Excellent log conformance
Bulk resistance (rBE) = 0.6 Ω maximum
Guaranteed matching for all transistors
APPLICATIONS
Low noise op amp front end
Current mirror and current sink/source
Low noise instrumentation amplifiers
Voltage controlled attenuators
Log amplifiers
GENERAL DESCRIPTION
The MAT14 is a quad monolithic NPN transistor that offers
excellent parametric matching for precision amplifier and
nonlinear circuit applications. Performance characteristics
of the MAT14 include high gain (300 minimum) over a wide
range of collector current, low noise (3 nV/√Hz maximum at
100 Hz, IC = 1 mA), and excellent logarithmic conformance.
The MAT14 also features a low offset voltage of 100 µV typical
and tight current gain matching to within 4%. Each transistor of
the MAT14 is individually tested to data sheet specifications.
For matching parameters (offset voltage, input offset current,
and gain match), each of the dual transistor combinations are
PIN CONFIGURATION
C1 1
14 C4
B1 2
13 B4
E1 3 MAT14 12 E4
SUB 4 TOP VIEW 11 SUB
E2 5 (Not to Scale) 10 E3
B2 6
9 B3
C2 7
8 C3
Figure 1.
verified to meet stated limits. Device performance is guaranteed
at an ambient temperature of 25°C and over the industrial tem-
perature range.
The long-term stability of matching parameters is guaranteed
by the protection diodes across the base emitter junction of
each transistor. These diodes prevent degradation of beta and
matching characteristics due to reverse bias, base emitter current.
The superior logarithmic conformance and accurate matching
characteristics of the MAT14 make it an excellent choice for use
in log and antilog circuits. The MAT14 is an ideal choice in
applications where low noise and high gain are required.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.
1 page  
MAT14
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Voltage
Collector-to-Base Voltage (BVCBO)
Collector-to-Emitter Voltage (BVCEO)
Collector-to-Collector Voltage (BVCC)
Emitter-to-Emitter Voltage (BVEE)
Current
Collector Current (IC)
Emitter Current (IE)
Temperature
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Rating
40 V
40 V
40 V
40 V
30 mA
30 mA
−65°C to +150°C
−40°C to +85°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type
14-Lead SOIC
θJA
115
θJC
36
Unit
°C/W
ESD CAUTION
Rev. A | Page 4 of 12
5 Page 
MAT14
NOTES
Rev. A | Page 10 of 12
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet MAT14.PDF ] | |
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