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PDF CA3440M Data sheet ( Hoja de datos )

Número de pieza CA3440M
Descripción 63kHz/ Nanopower/ BiMOS Operational Amplifiers
Fabricantes Intersil Corporation 
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No Preview Available ! CA3440M Hoja de datos, Descripción, Manual

Semiconductor
January 1999
POSSOIBBLSEICOSLLU7EB6T1SE1T,PIITRCUOLT7DE6U1PC2RTODUCT
CA3440
63kHz, Nanopower,
BiMOS Operational Amplifiers
Features
Description
• High Input Resistance . . . . . . . . . . . . . . . . . . . 2T(Typ)
• Standby Power at V+ = 5V . . . . . . . . . . . . . 300nW (Typ)
• Supply Current, BW, Slew Rate Programmable Using
External Resistor
• Input Current . . . . . . . . . . . . . . . . . . . . . . . . . 10pA (Typ)
• 5V to 15V Supply
• Output Drives Typical Bipolar Type Loads
Part Number Information
PART NUMBER
(BRAND)
CA3440M
(3440)
TEMP.
RANGE (oC)
PACKAGE
-55 to 125 8 Ld SOIC
PKG.
NO.
M8.15
The CA3440 is an integrated circuit operational amplifier that
combines the advantages of MOS and bipolar transistors on
a single monolithic chip.
The CA3440 BiMOS op amp features gate protected PMOS
transistors in the input circuit to provide very high input
impedance, very low input currents (less than 10pA). This
device operates at total supply voltages from 5V to 15V and
can be operated over the temperature range from -55oC to
125oC. The virtues are programmability and very low
standby power consumption (300nW). This operational
amplifier is internally phase compensated to achieve stable
operation in the unity gain follower configuration. Terminals
are also provided for use in applications requiring input
offset voltage nulling. The use of PMOS in the input stage
results in common mode input voltage capability down to
0.5V below the negative supply terminals, an important
attribute for single supply applications. The output stage
uses MOS complementary source follower form which
permits moderate load driving capability (10k) at very low
standby currents (50nA).
The CA3440 has the same 8 lead pinout as the “741” and
other industry standard op amps with two exceptions:
terminals one and five must be connected to the negative
supply or to a potentiometer if nulling is required. Terminal 8
must be programmed through an external resistor returned
to the negative supply.
Pinout
CA3440
(SOIC)
TOP VIEW
V-/OFFSET NULL 1
INV. INPUT 2
NON-INV. INPUT 3
V- 4
-
+
8 ISET
7 V+
6 OUTPUT
5 V-/OFFSET NULL
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1999
3-146
File Number 1318.5

1 page




CA3440M pdf
CA3440
Typical Performance Curves (Continued)
12 TA = 25oC
VS = ±5V
10 ISET = 1µA
8
6
4
2
1k
1kHz
-5V 10M
1
+5V
0.1
8
2-
7
µF
CA3440 6
3
+5
4
100
k
-5V 0.1µF
0
0
2
4
6
8 10 12 14 16 18
LOAD RESISTANCE (k)
FIGURE 7. TOTAL HARMONIC DISTORTION vs LOAD
RESISTANCE
0 TA = 25oC
V- = 0V
RSET = 1G
-2
-4
V+ = 5V
-6
V+ = 10V
-8
-10
0.01
V+ = 12V
0.1 1
10
LOAD SOURCING CURRENT (mA)
100
FIGURE 8. OUTPUT VOLTAGE vs SOURCING LOAD CURRENT
12 TA = 25oC
V+ = 0V
10 RSET = 1G
8
6
V- = -12V
V- = -10V
4
V- = -5V
2
0
0.01
0.1 1
LOAD SINKING CURRENT (mA)
10
FIGURE 9. OUTPUT VOLTAGE vs SINKING LOAD CURRENT
106
105
104
103
102
101
1
101 102 103 104
SET CURRENT (nA)
FIGURE 11. BANDWIDTH vs SET CURRENT
105
104
TA = 25oC
RSET = 10M
103
102
VS = ±2.5V
VS = ±5V
VS = ±10V
101
101
102 103
FREQUENCY (Hz)
104
FIGURE 10. INPUT NOISE VOLTAGE vs FREQUENCY
106
105
104
103
102
1
101 102 103 104
SET CURRENT (nA)
FIGURE 12. SLEW RATE vs SET CURRENT
105
3-150

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