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PDF CDP68EM05D2 Data sheet ( Hoja de datos )
| Número de pieza | CDP68EM05D2 | |
| Descripción | CMOS High-Performance Silicon-Gate 8-Bit Microcomputer Piggyback Emulator | |
| Fabricantes | GE | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CDP68EM05D2 (archivo pdf) en la parte inferior de esta página. Total 5 Páginas | ||
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680S-Serles Microprocessors and Microcomputers
CDP68EM05D2
TERMINAL ASSIGNMENT
R""E"SET
TiiQ
NO
'"'''''''""""""""0
'"''""".
'''V"""ss
40-Lead Piggyback Package
CMOS High-Performance Silicon-Gate
8-Bit Micr~computer Piggyback Emulator
Features:
• All CDP68HC05D2 hardware and software features
• Un-multiplexed external address, data, and READ control lines
• Full 8K byte address space available (8064 bytes available externally)
• 96 bytes of on-Chip RAM, no ROM
• Direct interface to industry standard EPROMs
• 40-/ead piggyback package (1) with 28-ho/e socket for 2764 EPROM (2)
The CDP68EM05D2 Emulator device, a functional equivalent
to the CDP68HC05D2 microcomputer, is designed to permit
prototype development and preproduction of systems for
mask-programmed applications. Data and address bus, as
well as control signals are externally available.
In addition to this feature, the CDP68EM05D2 Emulator
differs from the CDP68HC05D2 in the following ways:
1) Memory locations which are occupied by ROM on the
CDP68HC05D2 are accessed as external locations with
the CDP68EM05D2 Emulator intended to interface to a
programmable ROM.
•
TCMP
PAO
PAl
PORT PA2
A PA3
I/O PA4
LINES PAS
PA6
PA7
DATA
DIR
REG
PBO
PBl
PORT PB2
B PB3
I/O PB4
LINES
PBS
PB6
P87
DATA
DIR
REG
-~... ~ 20
BUS
... CE
CONTROL
OSCl OSC2
INTERNAL
PROCESSOR CLOCK, iiESE'i
,--_ _ _ _ _ _=-2 iRa
ACCUMULATOR
8A
INDEX
REGISTER
X
CONDITION
CODE
S REGISTER CC
STACK
POINTER
6S
PROGRAM
COUNTER
HIGH PCH
PROGRAM
COUNTER
8 LOW PCL
CPU
CONTROL
CPU
ALU
DATA
DIR
REG
DATA
OIR
REG
SPI
SYSTEM
PCO
PCl
PC2
PORT
PC3 C
PC4 I/O
PCS LINES
PCB
PC7
TO TIMER SYSTEM
PD7
I!TOSCl (PDO)
TIMER
TOSC2 (POl) OSCILLATOR
MISO (PD2)
MOSl (PD3)
SPI
~K (PD4) SYSTEM
SS (PDS)
DESIGNATES EPROM
.. SOCKET
~~~~~~~~
* DATA BUS
~~~~~~~~~~~~~
*ADDRESS BUS
Fig. 1 - CDP68EM05D2 CMOS micrDcompu1er block diagram.
92CM-42534
File Number 1960
______________________________________________________________ 355
1 page  
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 6805-Serles Microprocessors and Microcomputers
CDP68EM05D2
PORT
A
r--
r--
r--
4,
,3
2>
1,
0,
>, ,>- ,>
>> >
,> > >
>>
l+
OPEN DRAIN
SOFTWARE
PROGRAMMABLE
OUTPUTS
PORT
dKEYBOARD
INTERRUPT
-
-
-
-
-+--
13
92CS -37512RI
Fig. 7 - Keyboard interface to illustrate use of Open Drain Output
Port.
III
OPERATING AND HANDLING CONSIDERATIONS
1. Handling
All inputs and outputs of RCA CMOS devices have a
network for electrostatic protection during handling.
Recommended handling practices for CMOS devices
are described in ICAN-6525. "Guide to Better Handling
and Operation of CMOS Integrated Circuits."
2. Operating
Operating Voltage
During operation near the maximum supply voltage
limit. care should be taken to avt ~ or suppress power
supply turn-on and turn-off transients. power supply
ripple. or ground noise; any of these conditions must
not cause Voo - Vss to exceed the absolute maximum
rating.
Input Signals
To prevent damage to the input protection circuit. input
signals should never be greater than Vee nor less than
Vss. Input currents must not exceed 10 mA even when
the power supply is off.
Unused Inputs
A connection must be provided at every input terminal.
All unused input terminals must be connected to either
Vee or Vss. whichever is appropriate.
Output Short Clrculta
Shorting of outputs to VDD• Vee or Vss may damage
CMOS devices by exceeding the maximum device
dissipation.
_________________________________________________________________ 359
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| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet CDP68EM05D2.PDF ] | |
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