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PDF FM8P756 Data sheet ( Hoja de datos )
| Número de pieza | FM8P756 | |
| Descripción | OTP-Based 8-Bit Microcontroller | |
| Fabricantes | Feeling Technology | |
| Logotipo |  |
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FEELING
TECHNOLOGY
FM8P756
OTP-Based 8-Bit Microcontroller with LCD Driver
Devices Included in this Data Sheet:
FM8P756A : 24-pin OTP device
FM8P756B : 20-pin OTP device
FM8P756C : 16-pin OTP device
FM8P756D : 28-pin OTP device with VR pin
FM8P756E : 24-pin OTP device with VR pin
FM8P756F : 18-pin OTP device with VR pin
FM8P756G : 20-pin OTP device with VR pin
FEATURES
Total 8 channel 10bit AD converter with ±2LSB resolution
All instructions are single cycle except for program branches which are two-cycles
All OTP area GOTO instruction
All OTP area subroutine CALL instruction
8-bit wide data path
8-level deep hardware stack
2K x 16 bits on chip OTP
36x8 bits on chip special purpose registers and 96 x 8 bits on chip general purpose registers (SRAM)
Operating speed: DC-20 MHz clock input, or DC-100 ns instruction cycle
Direct, indirect addressing modes for data accessing
Three real time down-count Timer/Counter with 3-bit programmable prescaler
- TMR1: 8-bit, PWM1 & Timer
- TMR2: 8-bit, PWM2 & Timer
- TMR3: 8-bit, Timer
Software controlled 4-COM lines LCD driver with 1/2bias
Built-in 3 levels Low Voltage Detector (LVDT) (2.2V/2.6V/3.7V) for Brown-out Reset (BOR)
Power-up Reset Timer (PWRT)
On chip Watchdog Timer (WDT) with internal oscillator for reliable operation and soft-ware watch-dog
enable/disable control
Three I/O ports Port A, Port B and Port C with independent direction control
- 21 Bi-direction I/O port (Programmable Pull-up enable in Input mode)
- One Input only port (IOA7/RSTB)
Four kinds of interrupt source: 3 Timers/Counters, 8 external interrupt sources: IOA0~IOA7, Internal watchdog
timer (i_WDT) wakeup, and A/D end of conversion
Wake-up from SLEEP:
- Port A (IOA0~IOA7) pin change wakeup
- WDT overflow
- i_WDT overflow
Power saving SLEEP mode
Programmable Code Protection
Selectable oscillator options:
- ERC: External Resistor/ Voltage Controlled Oscillator
- XT: Crystal/Resonator Oscillator
- LF: Low Frequency Crystal Oscillator
- HIRC: Internal Resistor/Capacitor High speed Oscillator
- LIRC: Internal Resistor/Capacitor Low speed Oscillator
Operating voltage range:
- ≤4MHz: 2.2V to 5.5V
- ≤8MHz: 2.4V to 5.5V, see 6.1 for more information.
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice.
No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product.
Web site: http://www.feeling-tech.com.tw
Rev 1.01.020 Nov 12, 2014
P.1/FM8P756
1 page  
FEELING
TECHNOLOGY
PDIP18, SOP18 (With VR PIN)
FM8P756
IOA3/ADC3/INT3 1
18 IOA4/ADC4/INT4/PWM1
IOA2/ADC2/INT2/TMCKI 2
17 IOA5/INT5/OSCO/CLO
IOA1/ADC1/INT1 3
16 IOA6/INT6/OSCI
IOA0/ADC0/INT0 4
15 IOA7/INT7/RSTB
VSS 5 FM8P756F 14 VR
IOC1 6
13 VDD
IOB0/COM0 7
12 IOB5/ADC6
IOB1/COM1 8
11 IOB4/ADC5/PWM2
IOB2/COM2 9
10 IOB3/COM3
PIN DESCRIPTIONS
Name
I/O
Description
IOA0/AD0/INT0
|
IOA4/AD4/INT4
IOA5/INT5
/OSCO
IOA6/INT6
/OSCI
IOA7/INT7
/RSTB
Bi-direction I/O port (programmable Pull-high in Input mode)
Wake-up on pin change
I/O External interrupt input
A/D converter input
IOA4 is PWM1 output
Bi-direction I/O port (programmable Pull-high in Input mode)
Wake-up on pin change
I/O External interrupt input
Clock output shared with IOA5
Oscillator output (XT, LF, ERC mode)
Bi-direction I/O port (programmable Pull-high in Input mode)
I/O
Wake-up on pin change
External interrupt input
Oscillator input (XT, LF, ERC mode)
Input port
Wake-up on pin change
I External interrupt input
System clear (RESET) input. This pin is an active low RESET to the device.
The voltage on this pin must not exceed VDD.
IOB0/COM0
|
IOB3/COM3
IOB4/AD5
|
IOB5/AD6
I/O
Bi-direction I/O port (programmable Pull-high in Input mode)
Software controlled 1/2bias LCD COM0 ~ COM3 output
Bi-direction I/O port (programmable Pull-high in Input mode)
I/O IOB4 is PWM2 output
A/D converter input
IOC0
|
IOC6
IOC7/ADC7
I/O
Bi-direction I/O port (programmable Pull-high in Input mode)
LCD segment output
Bi-direction I/O port (programmable Pull-high in Input mode)
I/O LCD segment output
A/D converter input
VR - ADC module reference input. The voltage on this pin must not exceed VDD.
VDD
- Positive supply
VSS
- Ground
Legend: I=input, O=output, I/O=input/output
Note: Please refer to 2.2 for detail IO type description
Web site: http://www.feeling-tech.com.tw
Rev 1.01.020 Nov 12, 2014
P.5/FM8P756
5 Page 
FEELING
TECHNOLOGY
FM8P756
Situation 4: Instruction with PCL as destination
PCH
10 9 8 7
PC
PCHBUF - - - - -
PCL
0
ALU result <7:0>
Or Opcode <7:0>
ALU result Carry
2.1.3 STATUS (Status Register)
Address
Name
B7
B6
B5
B4
B3
B2
B1
B0
03h (r/w) STATUS
-
-
-
T̅̅O̅̅ P̅̅̅D̅
Z
DC C
Legend: - = unimplemented, read as ‘0’.
This register contains the arithmetic status of the ALU, the RESET status.
If the STATUS Register is the destination for an instruction that affects the Z, DC or C bits, then the write to these
three bits is disabled. These bits are set or cleared according to the device logic. Furthermore, the T̅̅O̅̅ and
P̅̅̅D̅ bits are not writable. Therefore, the result of an instruction with the STATUS Register as destination may be
different than intended. For example, CLRR STATUS will clear the upper three bits and set the Z bit. This leaves
the STATUS Register as 000u u1uu (where u = unchanged).
C : Carry/borrow bit.
ADDAR
= 1, Carry occurred.
= 0, No Carry occurred.
SUBAR
= 1, No borrow occurred.
= 0, Borrow occurred.
Note : A subtraction is executed by adding the two’s complement of the second operand. For rotate (RRR,
RLR) instructions, this bit is loaded with either the high or low order bit of the source register.
DC : Half carry/half borrow bit
ADDAR
= 1, Carry from the 4th low order bit of the result occurred.
= 0, No Carry from the 4th low order bit of the result occurred.
SUBAR
= 1, No Borrow from the 4th low order bit of the result occurred.
= 0, Borrow from the 4th low order bit of the result occurred.
Z : Zero bit.
= 1, The result of a logic operation is zero.
= 0, The result of a logic operation is not zero.
Web site: http://www.feeling-tech.com.tw
Rev 1.01.020 Nov 12, 2014
P.11/FM8P756
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet FM8P756.PDF ] | |
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