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PDF FM8PU83 Data sheet ( Hoja de datos )

Número de pieza FM8PU83
Descripción Full-Speed USB Controller
Fabricantes FEELING TECHNOLOGY 
Logotipo FEELING TECHNOLOGY Logotipo



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No Preview Available ! FM8PU83 Hoja de datos, Descripción, Manual

FEELING
TECHNOLOGY
FM8PU83
FM8PU83
Full-Speed USB Controller
Datasheet R01
June 1 2009
P.1 R01 June 1, 2009
FM8PU83

1 page




FM8PU83 pdf
FEELING
TECHNOLOGY
FM8PU83
1.0 General Description
The FM8PU83 is an 8-bit microprocessor embedded device tailored to the USB application. It includes
an 8-bit RISC CPU core, 192 byte SRAM, Full Speed and Low Speed USB Interface and a 2.75K x 14
internal program OTP-ROM.
2.0 Features
Support Full-Speed and Low-Speed USB 1.1 specification.
Built-in USB Transceiver and 3.3V regulator.
Support USB Suspend and Resume function.
One Control IN/OUT, two INT endpoints .
Support PS2 compatible interface share with USB interface.
192 bytes internal SRAM.
2.75K x 14 internal program OTP-ROM
8-bit RISC CPU core.
Support Master/Slave SPI serial Communication Interface.
Support up to two user configured endpoints.
Up to three 8-byte data endpoints (EP0,EP1,EP2).
Internal Clock Generator
0.25% Accuracy after Memories calibration.
Supply 24MHz or 16MHz or 12MHz clock output.
General-purpose programmable-level IO interface.
5V power supply only; GPIO support 1.8V~5V interface.
Supply 3.3V voltage.
Support SSC to reduce EMI.
3.0 Block Diagram
DP
USB
Transceiver
DN
USB
SIE
USB
Controller
8-bit RISC
CPU
2.75K x 14 Program
OTP ROM
192 Bytes
SRAM
3.3V Regulator
IRC
SPI
GPIO
PortA
GPIO
PortB
EPT
FIFO
P.5 R01 June 1, 2009
FM8PU83

5 Page





FM8PU83 arduino
FEELING
TECHNOLOGY
FM8PU83
Address 05H : Port A (PORTA)
Bits Name
Description
7~0 PORTA
Port A data input/output
Read Write Default
Yes Yes 00h
Address 06H :Port B (PORTB)
Bits Name
Description
7~0 PORTB
Port B data input/output
Read Write Default
Yes Yes 00h
Address 07H :Port C (PORTC)
Bits Name
Description
7~2 Reversed Revered
1 PORTC[1] D+(SCLK).The state of the D+ pins can be read at Port C data
register.
0 PORTC[0] D-(SDATA).The state of the D- pins can be read at Port C data
register.
Read Write Default
Yes No 00h
Yes Yes 1
Yes Yes 1
Address 08H : Power Control Register (PCON)
Bits Name
Description
Read
7 WDTE
Watch-dog timer enable (0:disable,1:enable)
Yes
6 WDTSL
Watch-dog timer out select .
Yes
1: If Watch-dog timer out ,the Device be reset.
0: If Watch-dog timer out ,Device only SUSPMD(12.7H) be clear.
5~3 WDTPS[2:0] WDT prescaler
Yes
2 LVR
0: When LVDT is high or low, Device still normal work.
Yes
1: When LVDT is low , Device will be cleared SUSPEN(12.7H) bit
by H/W..
1~0 Revered
Revered
Yes
Write Default
Yes 1
Yes 1
Yes 0h
Yes 1
No 0h
WDTPS[2:0]
3’b000
3’b001
3’b010
3’b011
3’b100
3’b101
3’b110
3’b111
18ms*1
18ms*2
18ms*4
18ms*8
18ms*16
18ms*32
18ms*64
= 18ms
= 36ms
= 72ms
= 144ms
= 288ms
= 572ms
= 1152ms
WDT time out
18ms*128 = 2304ms
TABLE 7-4 WDT Prescaler
Address 09H : Port B Interrupt Control Register (PBIE)
Bits Name
Description
7~0 PBIE
Port B interrupt enable bits (0:disable ,1:enable )
Read Write Default
Yes Yes 00h
Address 0AH : Port B Wake-up Control Register (PBCON)
Bits Name
Description
7~0 PBCON
0 : falling edge(port B ), 1: Pin-changed (port B )
Read Write Default
Yes Yes 00h
P.11
R01 June 1, 2009
FM8PU83

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