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PDF 20N50E Data sheet ( Hoja de datos )
| Número de pieza | 20N50E | |
| Descripción | MTW20N50E | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 20N50E (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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MTW20N50E
Preferred Device
Power MOSFET
20 Amps, 500 Volts
N–Channel TO–247
This high voltage MOSFET uses an advanced termination scheme
to provide enhanced voltage–blocking capability without degrading
performance over time. In addition, this advanced Power MOSFET is
designed to withstand high energy in the avalanche and commutation
modes. The new energy efficient design also offers a drain–to–source
diode with a fast recovery time. Designed for high voltage, high speed
switching applications in power supplies, converters and PWM motor
controls, these devices are particularly well suited for bridge circuits
where diode speed and commutating safe operating areas are critical
and offer additional safety margin against unexpected voltage
transients.
• Robust High Voltage Termination
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
• Isolated Mounting Hole Reduces Mounting Hardware
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol Value
Drain–Source Voltage
Drain–Gate Voltage (RGS = 1.0 MΩ)
Gate–Source Voltage
– Continuous
– Non–Repetitive (tp ≤ 10 ms)
Drain Current – Continuous
Drain Current – Continuous @ 100°C
Drain Current – Single Pulse (tp ≤ 10 µs)
Total Power Dissipation
Derate above 25°C
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
500
500
± 20
± 40
20
14.1
60
250
2.0
Operating and Storage Temperature Range TJ, Tstg –55 to
150
Single Pulse Drain–to–Source Avalanche
Energy – Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc,
IL = 20 Apk, L = 10 mH, RG = 25 Ω)
Thermal Resistance – Junction to Case
Thermal Resistance – Junction to Ambient
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
EAS
RθJC
RθJA
TL
2000
0.50
40
260
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
°C
mJ
°C/W
°C
http://onsemi.com
20 AMPERES
500 VOLTS
RDS(on) = 240 mΩ
N–Channel
D
G
1
23
S
4
TO–247AE
CASE 340K
Style 1
MARKING DIAGRAM
& PIN ASSIGNMENT
4
Drain
MTW20N50E
LLYWW
1
Gate
3
Source
2
Drain
LL = Location Code
Y = Year
WW = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MTW20N50E
TO–247
30 Units/Rail
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2000
November, 2000 – Rev. 5
1
Publication Order Number:
MTW20N50E/D
1 page  
MTW20N50E
10
8
Q1
6
QT
Q2
VGS
500
400
300
4 200
ID = 20 A
TJ = 25°C
2 100
Q3 VDS
00
0 10 20 30 40 50 60 70 80 90 100
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate–To–Source and Drain–To–Source
Voltage versus Total Charge
1000
VDD = 250 V
ID = 20 A
VGS = 10 V
TJ = 25°C
100
td(off)
tr
tf
td(on)
10
1 10 100
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
20
VGS = 0 V
16 TJ = 25°C
12
8
4
0
0.50 0.54 0.58 0.62 0.66 0.70 0.74 0.78 0.82 0.86 0.90 0.94
VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain–to–source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal
Resistance–General Data and Its Use.”
Switching between the off–state and the on–state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10 µs. In addition the total
power averaged over a complete switching cycle must not
exceed (TJ(MAX) – TC)/(RθJC).
A Power MOSFET designated E–FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non–linearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many E–FETs can withstand the stress of
drain–to–source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry
custom. The energy rating must be derated for temperature
as shown in the accompanying graph (Figure 12). Maximum
energy at currents below rated continuous ID can safely be
assumed to equal the values indicated.
http://onsemi.com
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 20N50E.PDF ] | |
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