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Número de pieza | MT6572 | |
Descripción | HSPA Smartphone Application Processor Technical | |
Fabricantes | MediaTek | |
Logotipo | ||
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No Preview Available ! MT6572 HSPA Smartphone
Application Processor Technical
Brief
Version:
1.0
Release date: 2013-01-02
© 2011 - 2013 MediaTek Inc.
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Specifications are subject to change without notice.
[email protected],time=2013-01-07 12:43:58,ip=218.75.87.37,doctitle=MT6572 HSPA Smartphone Application Processor Technical Brief v1.0.pdf,company=Bird_WCX
1 page MT6572
HSPA Smartphone Application Processor Technical
Brief
V1.0 Confidential A
Preface
Acronyms for register types
R/W
RO
RC
WO
W1S
W1C
For both read and write access
Read only
Read only. After the register bank is read, every bit that is HIGH(1) will be cleared to LOW(0)
automatically.
Write only
Write only. When data bits are written to the register bank, every bit that is HIGH(1) will
cause the corresponding bit to be set to 1. Data bits that are LOW(0) have no effects on the
corresponding bit.
Write only. When data bits are written to the register bank, every bit that is HIGH(1) will
cause the corresponding bit to be cleared to 0. Data bits that are LOW(0) have no effects on
the corresponding bit.
MediaTek Confidential
© 2013 MediaTek Inc.
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Page 5 of 64
[email protected],time=2013-01-07 12:43:58,ip=218.75.87.37,doctitle=MT6572 HSPA Smartphone Application Processor Technical Brief v1.0.pdf,company=Bird_WCX
5 Page MT6572
HSPA+ Smartphone Application Processor
Technical Brief
Confidential A
1.4 Multimedia Features
Display
Supports landscape or portrait
panel resolution up to qHD
(960x540)
Supports 8/9/16/18-bit host
interface (MIPI DBI)
Supports 8/9/16/18/24/32-bit
serial interfaces
Supports landscape or portrait
panel resolution up to qHD
(960x540)
Supports 8/9/16/18-bit host
interface (MIPI DBI)
Supports 8/9/16/18/24/32-bit
serial interfaces
Supports 16/18/24-bit RGB
interfaces (MIPI DPI)
MIPI DSI interface (3 data lanes)
Embedded LCD gamma
correction
Supports true colors
4 overlay layers with per-pixel
alpha channel and gamma table
Supports spatial and temporal
dithering
Supports side-by-side format
output to stereo 3D panel in both
portrait and landscape modes
Supports color enhancement
Supports adaptive contrast
enhancement
Supports image/video/graphic
sharpness enhancement
Supports dynamic backlight
scaling
Graphics
OpenGL ES 1.1/2.0 3D graphic
accelerator
OpenVG1.1 vector graphics
accelerator
Image
Supports 5 MP Capture up to
15fps
Supports MIPI CSI-2 high-speed
camera serial interface with 2
data lane (for main) + 2 data lane
(for sub)
Supports face detection and
visual tracking
Supports zero shutter delay
image capture
Supports capturing image when
recording video
Supports JPEG decoder for
baseline decoding up to 29.4M
pixel/sec; supports progressive
format decoding
Supports JPEG encoder for
baseline encoding up to 17.5M
pixel/sec
Video
H.264 decoder: Baseline 720p @
30fps
H.264 decoder: Main/high profile
720p@30fps
MPEG-4 SP/ASP decoder: 720p
@ 30fps
DIVX3/DIVX4/DIVX5/DIVX6/DIV
X HD/XVID decoder: 720p @
30fps
VP8 decoder: 720p @ 30fps
VC-1 decoder: 720p @ 30fps
MPEG-4 encoder: Simple profile
720p @ 30fps
H.263 encoder: 720p @ 30fps
H.264 encoder: Baseline profile
VGA @ 24fps
Audio
Sampling rates supported: 8kHz
to 48kHz
MediaTek Confidential
© 2013 MediaTek Inc.
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Page 11 of 64
[email protected],time=2013-01-07 12:43:58,ip=218.75.87.37,doctitle=MT6572 HSPA Smartphone Application Processor Technical Brief v1.0.pdf,company=Bird_WCX
11 Page |
Páginas | Total 30 Páginas | |
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