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PDF CD4078BMS Data sheet ( Hoja de datos )
| Número de pieza | CD4078BMS | |
| Descripción | CMOS 8 Input NOR/OR Gate | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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CD4078BMS
December 1992
CMOS 8 Input NOR/OR Gate
Features
• High Voltage Type (20V Rating)
• Medium Speed Operation
- tPHL, tPLH = 75ns (Typ.) at VDD = 10V
• Buffered Inputs and Output
• 5V, 10V and 15V Parametric Ratings
• Standardized, Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25oC
• Noise Margin (Over Full Package/Temperature Range)
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Description
CD4078BMS NOR/OR Gate provides the system designer with
direct implementation of the positive logic 8 input NOR and OR
functions and supplements the existing family of CMOS gates.
The CD4078BMS is supplied in these 14 lead outline packages:
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack
H4Q
H1B
H3W
Pinout
CD4078BMS
TOP VIEW
K ** 1
A2
B3
C4
D5
NC 6
VSS 7
14 VDD
13 J *
12 H
11 G
10 F
9E
8 NC
* J = A + B + C + D + E + F + G + H ** K = A + B + C + D + E + F + G + H
NC = NO CONNECTION
Functional Diagram
2
A
3
B
4
C
5
D
9
E
F 10
11
G
12
H
1
K
13
J
J=A+B+C+D+E+F+G+H
K=A+B+C+D+E+F+G+H
6, 8 = NO CONNECTION
VDD = 14
VSS = 7
Logic Diagram
A2
B3
C4
D5
E9
F 10
13 J
1K
G 11
H 12
FIGURE 1. LOGIC DIAGRAM
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-1038
File Number 3326
1 page  
Specifications CD4078BMS
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
Interim Test 2 (Post Burn-In)
100% 5004
1, 7, 9
PDA (Note 1)
100% 5004
1, 7, 9, Deltas
Interim Test 3 (Post Burn-In)
100% 5004
1, 7, 9
PDA (Note 1)
100% 5004
1, 7, 9, Deltas
Final Test
100% 5004
2, 3, 8A, 8B, 10, 11
Group A
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Group D
Sample 5005
1, 2, 3, 8A, 8B, 9
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
READ AND RECORD
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
CONFORMANCE GROUPS
Group E Subgroup 2
TABLE 7. TOTAL DOSE IRRADIATION
MIL-STD-883
METHOD
TEST
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
READ AND RECORD
PRE-IRRAD
POST-IRRAD
1, 9 Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
9V ± -0.5V
50kHz
25kHz
Static Burn-In 1
Note 1
1, 6, 8, 13
2-5, 7, 9-12
14
Static Burn-In 2
Note 1
1, 6, 8, 13
7 2-5, 9-12, 14
Dynamic Burn-
In Note 1
6, 8
7
14
1, 13
2-5, 9-12
Irradiation
Note 2
1, 6, 8, 13
7 2-5, 9-12, 14
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
1042
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