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PDF UM8031 Data sheet ( Hoja de datos )
| Número de pieza | UM8031 | |
| Descripción | Single Chip 8-Bit Microcomputer | |
| Fabricantes | UMC | |
| Logotipo |  |
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eUMC UMBOS1 / UMB031
======::::Single Chip 8-Bit Microcomputer
Features
• 4K x BROM
• 128 x 8 RAM
• Four 8-bit ports, 32 I/O lines
• Two 16-bit timer/event counters
• High-performance full-duplex serial channel
• External memory expandable to 128K
• Boolean processor
• UM8048 architecture enhanced with:
• Non-paged jumps
• Direct addressing
• Four 8-register banks
• Stack depth up to 128 -bytes
• Multiply, divide, subtract, compare
• Most instructions execute in 1~s
• 4~s multiply and divide
General Description
The UM8051/8031 is a stand-alone, high-performance
single-chip computer fabricated with UMC's highly-reliable
+5 Volt, NMOS technology and packaged in a 40-pin DIP.
It provides the hardware features, architectural enhance-
ments and new instructions that are necessary to make
it a. powerful·and cost effective controller for applications
requiring up to 64K bytes of program memory and/or up
to 64K bytes of data storage.
The UM8051/8031 contains a non-volatile 4K x 8 read-
only program memory, a volatile 128 x 8 read/write data
memory; 32 I/O lines; two 16-bit timer/counters; a five-
source, two-priority-Ievel. nested interrupt structure; a
serial I/O port for either mUlti-processor communications,
I/O expansion, or full duplex UART; and on-chip oscillator
and clock circuits. The UM8031 is identical, except that
it lacks the program memory. For systems. that req.u ire
extra capability, theUM8051 can be expanded using
standard TTL compatible memories.
The UM8051 microcomputer, like its UM8048 predecessor,
is efficient both as a controller and as an arithmetic pro-
cessor. The UM8051 has extensive facilities for binary and
BCD arithmetic and excels in bit-handling capabilities.
Efficient use of program memory results from an instruc-
tion set consisting of 44% one-byte, 41% two-byte, and
15% three-byte instructions. With a 12 MHz crystal, 58%
of the instructions execute in 1~s, 40% in 2~s and multiply
and divide require only 4~s. Among the many instructions
added to the standard UM8048 instruction set are multiply,
divide, subtract and compare.
Pin Configuration
Pl.0
Pl.l
Pl.2
1'1.3
Pl.4
Pl.5
Pl.6
P1.7
RST
RXD/P3.0
TXD/P3.1
INTO/P3.2
TN'i'T/P3.3
TO/P3.4
Tl/P3.4
WR/P3.6
RD/P3.7
XTAL2
XTALl
VSS
Vcc
!,!O.O/ADO
PO.l/ADl
PO.2/AD2
PO.3/AD3
PO.4/AD4
PO.5/AD5
PO.6/AD6
PO.7/AD7
EA
ALE
PSEN
P2.7/A15
P2.6/A14
P2.5/A13
P2.4/A 12
P2.3/All
P2.2/Al0
P2.1/A9
P2.0/A8
Logic Symbol
RST
EA
PSEN
ALE
Uz'J
~~l· TRXXDD_-~
:J INTO- "'-
u. INT1_ I-
«~ TO- ~
T l - Cl.
6o WR--
RD-
~
U'J
<=>PORT
o
ADDRESS
AND
DATA BUS
PORT
PORT ~ ADDRESS
2 t-y
BUS
3-14
1 page  
EXTERNAL DATA MEMORY CHARACTERISTICS
Symbol
Parameter
TRLRH
TWLWH
TLLAX
TRLDV
TRHDX
TRHDZ
TLLDV
TAVDV
TLLWL
TAVWL
TWHLH
TDVWX
TOVWH
TWHOX
TRLAZ
RD Pulse Width
WR Pulse Width
Address Hold After ALE
RD To Valid Data In
Data Ho Id After RD
Data Float After RD
ALE To Valid Data In
Address To Valid Data In
ALE To WR or RD
Address To WR or RD
WR or RD High To ALE High
Data Valid To~WR Transition
Data Setup Before WR
Data Hold After WR
Address Float After RD
12 M,Hz Clock
Min.
400
400
48
0
200
203
43
23
433
33
Max.
250
97
517
585
300
123
0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UMS051 / UMS031
Variable Clock
1/TCLCL == 3.5 MHz to 12 MHz
Min.
Max.
Unit
6TCLCL-100
ns
6TCLCL-100
ns
TCLCL-35
5TCLCL-165
ns
0 ns
2TCLCL-70
ns
8TCLCL-150
ns
9TCLCL-165
ns
3TCLCL-50 3TCLCL + 50
ns
4TCLCL-130
ns
TCLCL-40
TCLCL + 40
ns
TCLCL-60
ns
7TCLCL-150
ns
TCLCL-50
ns
0 ns
Datum
Address
Write Data
Emitting Ports
P2, PO
PO
Degraded I/O Lines
P1, P3
Pl, P3, ALE
VOL (peak) (Max.)
0.8V
0.8V
EXTERNAL CLOCK DRIVE CHARACTERISTICS (XTAL2)
Symbol
TCLCL
TCHCX
TCLCX
TCLCH
TCHCL
Parameter
Osci lIator Period
High Time
Low Time
Rise Time
Fall Time
Variable Clock
freq = 3.5 MHz to 12 MHz
Min.
Max.
83.3
286
20
20
20
20
Unit
ns
ns
ns
ns
ns
3-18
5 Page 
DATA TRANSFER
UM8051!UM8031
Mnemonic
MOV A,Rn
MOV A. direct
MOV A,@Ri
MOV A # data
MOV Rn,A
MOV Rn, direct
MOV Rn, # direct
MOV direct, A
MOV direct, Rn
MOV direct, direct
MOV direct, @ Ri
MOV direct, # data
MOV @Ri,A
MOV @ Ri, direct
MOV @ Ri, # data
MOV DPTR, # data 16
MOVC A,@A+DPTR
MOVC A,@A+PC
MOVX A,@Ri
MOVX A. @ DPTR
MOVX @Ri,A
MOVX @DPTR, A
PUSH direct
POP direct
XCH· A. Rn
XCH A, direct
XCH A,@Ri
XCHD A.@Ri
Descriptions
Move register to accumulator
Move direct byte to accu mu lator
Move indirect RAM to accumulator
Move immediate data to accumulator
Move accumulator to register
Move direct byte to reg ister
Move direct byte to reg ister
Move accu mu lator to direct byte
Move register to direct byte
Move direct byte to direct
Move indirect RAM to direct byte
Move immediate data to direct byte
Move accumulator to indirect RAM
Move direct byte to indirect RAM
Move immediate data to indirect RAM
Load data pointer with a 16-bit ~onstant
Move code byte relative to DPTR to Acc
Move code byte relative to PC and Acc
Move external RAM (8-bit addr) to Acc
Move external RAM (16-bit addr) to Acc
Move Acc to external RAM (8-bit addr.)
Move Acc to external RAM (16-bit addr.)
Push direct byte onto stack
p.op direct byte from stack
Exchange register with accumulator
Exchange direct byte with accumulator
Exchange indirect RAM with accumulator
Exchange low-order digit indirect RAM with Acc
Bytes
1
2
1
2
1
2
2
2
2
3
2
3
1
2
2
3
1
1
1
1
1
1
2
2
1
2
1
1
Cycles
1
1
1
1
1
2
1
1
2
2
2
2
1
2
1
2
2
2
2
2
2
2
2
2
1
1
1
1
3-24
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet UM8031.PDF ] | |
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