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PDF TC571000D-20 Data sheet ( Hoja de datos )

Número de pieza TC571000D-20
Descripción SILICON STACKED GATE MOS
Fabricantes Toshiba 
Logotipo Toshiba Logotipo



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No Preview Available ! TC571000D-20 Hoja de datos, Descripción, Manual

TOSHIBA MOS MEMORY PRODUCT
1 MEGA BIT (131 ,072 WORD X 8 BIT)
SILICON STACKED GATE MOS
CMOS U.V. Erasable & Electrically
Programmable Read Only Memory
TC5710000-20, TC571 0000-25
TC571 0010-20, TC571 0010-25
IOESCRIPTIONj
The TC57l000D/TC57l00lD is a 131,072 word x 8 bit CMOS ultraviolet light erasable
and electrically programmable read only memory.
The TC57l000D is JEDEC standard pin configuration and the TC57l00lD is compatible with
28 pin It-! bit Mask ROM. Both products are packed in 32 pin standard cerdip package.
TC57l000D/TC57l00lD is fabricated with the CMOS technology. Advanced circuit techniques
provide both high speed and low power features with a maximum operating current of 30mA/
5.0MHz and access time of 200ns/250ns.
The programming times of the TC57l000D/TC57l00lD except overhead times of EPROM program-
mer is only 14 seconds by using the high speed programming algorithm.
IFEATURESI
• Peripheral circuit: CMOS
Memory cell
N-MOS
• Fast access Time
TC57l000D-20/TC57l00lD-20: 200ns
TC57l000D-25/TC57l00lD-25: 250ns
• Low power dissipation
Active : 30mA/5.0MHz
Standby: 100~A (Ta=85°C)
• Single 5V power supply
• Hide operating temperature range: -40'" 85°C
• Full static operation
• High speed programming operation: tpH O.lms
• Input and output TTL compatible
• JEDEC standard 32 pin: TC57l000D
• 1M MROM compatible
TC57l00lD
• Standard 32 pin DIP cerdip package
IPIN CONNECTION/ (TOP VIEW)
vec
A16 PGM
A15 NC
A12 Al4
A7 A13
A6 AS
A5 A9
A4 All
A3 OE
A2 A10
Al CE
AO D7
DO D6
Dl D5
D2 D4
GND D3
TC57l000D
vec (Reference)
OE Fern
A15 NC
vcc
A12 A14
A14
A7
A13 A7
A13
A6
AS A6
AS
A5
A9 A5
A9
A4 All
All
A3 A16
A16
A2
A10 A2
A10
Al CEr
CE
AO D7 AO D7
DO
D6 DO
D6
Dl
D5 Dl
D5
D2 D4 D2 D4
GND D3 GND D3
TC57l00lD
1M Mask ROM
(rC53l000P )
- 0-103-
I PIN NAr·1ES I
AO'" A16 Address Inputs
DO'" D7 Outputs (Inputs)
CE
Chip Enable
Input
or
Output Enable
Input
PGM
Program Control
Input
Vce
VCC Supply
Voltage
Vpp Program Supply
Voltage
GND Ground
NC No Connection

1 page




TC571000D-20 pdf
TC5710000-20, TC5710000-25
TC5710010-20, TC571001 0-25
IHIGH SPEED PROGRAM OPERATION I
D.C. RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
Vnl Input High Voltage
VIL Input Low Vo ltage
VCC VCC Power Supply Voltage
VPP VPP Power Supply Voltage
MIN.
2.2
-0.3
6.00
12.50
TIP.
-
-
6.25
12.75
MAX.
VCC+l.O
0.8
6.50
13.00
UNIT
V
D.C. AND OPERATING CHARACTERISTICS (Ta=25±5°C t Vcc=f.25±Q.25V t Vpp=12.75±0.25V)
SYl'lBOL
PARAMETER
TEST CONDITION MIN. TYP. MAX. UNIT
ILl Input Current
VIN=O IV VCC
-
- flO \.lA
VOH Output High Voltage
-IOH=-400\.lA
2.4
-
V
VOL Output Low Voltage
IOL=2.1rnA
- - 0.4 V
ICC VCC Supply Current
- - - 30 rnA
IpP2 VPP Supply Current
Vpp=13 .OV
- - 50 rnA
VID A9 Auto Sele~t Voltage
-
11.5 12.0 12.5
V
A.C. PROGRAM~'ING CHARACTERISTICS (Ta=25±5°C t VCC=6.25±0.25V t Vpp=12.75±0.25V)
SYl'lBOL
PARAMETER
TEST CONDITION MIN. TYP. HAX. UNIT
tAS
tAH
tCES
Address Setup Time
Address Hold Time
CE Setup Time
-
2 --
\.ls
-
2 --
\.lS
-
2 --
J.!S
tCEH CE Hold Time
-
2 --
\.lS
tDs Data Setup Time
tDH Data Hold Time
tvs VPP Setup Time
tP~-1 Program Pulse Width
-
2 --
\.lS
-
2 --
\.lS
-
2 --
\.lS
- 0.095 0.1 0.105 ms
tOE OE to Output Valid
- - - 100 ns
tDF2 D'E" to Output in High-Z
CE=VIL
- - 90 ns
A.C. TEST CONDITIONS
• Output Load
• Input Pulse Rise and Fall Time
• Input Pulse Levels
• Timing Measurement Reference Level:
1 TTL Gate and CL (IOOpF)
IOns Hax.
0.45V and 2.4V
Input 0.8V and 2.2V, Output 0.8V and 2.0V
- 0-107-

5 Page





TC571000D-20 arduino
TC5710000-20, TC571 0000-25
TC571 001 0-20, TC571001 0-25
IELECTRIC SIGNATURE MODEl
Electric signatu~e mode allows to read out a code from TCs71000D/TCs71001D which
identifies it's manufacturer and device type.
The programming equipment may read out manufacturer code and device code from
TCs71000D/TCs71001D by using this mode before program operation and automatically
set program voltage (Vpp) and algorithm.
Electric Signature mode is set up when 12V is applied to address line A9 and the
rest of address lines is set to VIL in read operation. Data output in this con-
ditions is manufacturer code. Device code is identified when address AO is set
to VIH. These two codes possess an odd parity with the parity bit of MSB (07).
The following table shows electric signature of TCs71000D/TCs71001D.
SIGNATURE
AO
°7 °6
°5 °4
°3
°2
HEX.
°1 °0 DATA
Hanufacture Code
VIL 1 0
01
1 0°
0 98
Device Code TCs71000D VIH
TCs71001D
10
00
00
00
0 1 1 0 86
0 1 1 1 07
Notes:
A9=12V±0.sV
A1 tv A8, A10 tv A16, CE, OE=VIL
PGM=VIH
- 0-113-

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