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PDF TC57256AD-20 Data sheet ( Hoja de datos )

Número de pieza TC57256AD-20
Descripción CMOS ultraviolet light erasable and electrically programmable read only memory
Fabricantes Toshiba 
Logotipo Toshiba Logotipo



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No Preview Available ! TC57256AD-20 Hoja de datos, Descripción, Manual

TOSHIBA MOS MEMORY PRODUCT
I DESCRIPTIONI
TC57256AD-15
TC57256AD-20
The TC57256AD is a 32,768 word X 8 bit CMOS ultraviolet light erasable and electrically programmable read only memory. For
read operation, the TC57256AD's access time is 150ns. The TC57256AD operates from a single 5-volt power supply and has a low
power standby mode which reduces power dissipation without increasing access time. The standby mode is achieved by applying a
TTL-high level signal to the CE input. Advanced CMOS technology reduces the maximum active current to 40mN6.7MHz and the
standby current to lOOJ.LA. For program operation, the programming is achieved by using the high speed prgramming mode. The
TC57256AD is fabricated using CMOS technology and N-channel silicon double layer gate MOS technology.
IFEATURESI
• Peripheral circuit: CMOS
Memory cell
: N-MOS
Low power dissipation
Active: 40mA/6.7MHz
Standby: lOO~A
• Fast access time:
TC572S6AD-IS lSOns
TCS7256AD-20 200ns
IPIN CONNECTIONI (TOP VIEW)
• Single 5V power supply
• Full static operation
• High speed programming mode
• Inputs and outputs TTL compatible
• Pin compatible with ROMs TC532.57P and
TMM23256P, TMM27256AD and TC57256AD
• Standard 28 pin DIP cerdip package
IBLOCK DIAGRAMI
vpp GND
0001 02 03 04. 05 OG 07
Vpp Vee
A12 A14
A7 A13
AS
A9
All
5E
A2 AlO
Al BE
AO 07
00 06
01 05
02 04
03
AO
Al
A2
A3
A4
A5
A6
A7
AS
A9
AIO
All
A12
A13
A14 U""""""'--_----'
32,76SXSoi ts
IPIN NAr~ESI
AO 'V A14 Address Inputs
00-°7' Outputs (Inputs)
CE Chip Enable Input
~ Output Enable Input
Vpp Program Supply
Voltage
Vce VCC Supply Voltage
(+5V)
GND Ground
IMt~OD~E SlE-- ,tJiljiQi'j] CE OE Vpp
(20) (22) (1)
VCC 00-07
(28' (11 'V 13. 15 'V 19)
POWER
*Read
L
Output Deselect
L
H
5V
SV
Data Out
High Impedance
Active
Standby
H*
High Impedance Standby
Program
LH
Data In
Program Inhibit H H 12.5V 6V High Impedance Active
Program Verify * L
* H or L
Data Out
- 0-73 -

1 page




TC57256AD-20 pdf
TC57256AD-15
TC57256AD-20
TJt.lING WAVEFORMS (PROGRA."1)
(VCC=6V±O.25V, Vpp=12.5V±O.5V)
00-07
x
-~ tpw
VNtOPW
----....
tCEH
IV
I
tDS
I
1DIN STABLE
~tOES
"tDH
\.
/
tOE
/
"-
K=
tAli
XXXy'~
tDEP
DOUT VALID
\.
/
VPP tV"PR
I
Vec tvcs
I
PROGRAM
PROGRAM VERIFY
Note: (1) Vee must be applied simultaneously with or before Vpp and cut off simultaneously with or after
Vpp.
(2) Removing the device from the socket or placing the device in the socket with Vpp=12.5V may
cause permanent damage to the device.
(3) The Vpp supply voltage is permitted up to 14V for program operation; voltages over 14V should
not be applied to the Vpp terminal. When a switching pulse voltage is applied to the Vpp terminal,
the overshoot voltage of the pulse should not exceed 14V.
- 0-77 -

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