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PDF TC5561P-55 Data sheet ( Hoja de datos )

Número de pieza TC5561P-55
Descripción CMOS STATIC RAM
Fabricantes Toshiba 
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No Preview Available ! TC5561P-55 Hoja de datos, Descripción, Manual

TOSHIBA MOS MEMORY PRODUCT
65,536 WORD X 1 BIT CMOS STATIC RAM
SILICON GATE CMOS
TC5561 P-55
TC5561 P-70
DESCRIPTION
The TC5561 P is a 65,536 bit high speed static
random access memory organized as 65,536 words
by 1 bit using CMOS technology, and Operated from
a single 5-volt supply.
Toshiba's high performance device technology
provides both high speed and low power features
with a maximum access time of 55ns/70ns and
maximum operating current of 100mA at minimum
cycle time.
The TC5561 P also features an automatic stand-by
mode. When deselected by Chip Enable (CE), the
FEATURES
• Fast access time: TC5561 P-55 55ns(MAX.)
TC5561 P-70 70ns(MAX.)
"Low power dissipation: Operation 1OOmA(MAX.)
Standby1 OOJLA(MAX.)
e 5V single power supply
PIN CONNECTION (TOP VIEW)
TC5 ~ti iF
AU
A,
II.".?
A3
A4
11.5
A6
A7
DOUT
'NE
OND
II
VDL'
Alb
11.14
11.13
11.1;0
.\11
AI0
A"
Ab
DIN
ITI;'
(3UOmi 1 DIP)
operating current is reduced from 1OOmA to 100JLA.
The TC5561 P is suitable for use in main memory
of high speed computer and pattern memory, where
high speed/low power/high density are required.
The TC5561 P is moulded in a 22 pin standard
plastic package with 0.3 inch width for high density
assembly.
The TC5561 P is' fabricated with ion implanted
COMS silicon gate MOS technology for high per-
formance and high reliability.
o Fully static operation
• Directly TTL compatible: All Input and Output
o I/O separate
• Package: 22 pin standard plastic package,
300mil width
BLOCK DIAGRAM
AD o-t-DlIJ
A3O-+Da:J
A4~.L..r"<"'--'
MEMORY C~LL
ARHAY
--0 vDD
- - - 0 aND
SENSI': AMP.
PIN NAMES
I Address Inputs
Data Input
DOUT
Data Output
-E: l ~~~~~~n;~~tPut --~CE --------,~~--C-h-IP-En-a-bl-e-lr-1p-u-'t----------1
- C-57 -

1 page




TC5561P-55 pdf
TC5561 P-55
TC5561 P-70
DATA RETENTION CHARACTERISTICS
SYMBOL
PARAMETER
VOH Data Retention Supply Voltage
loos2 Standb¥ Supply Current
teoH Chip Deselection to Data Retntion Mode
tR Recovery Time
(Ta= -40-50'C)
I Voo=3.0V
I Voo=5.5V
MIN.
2.0
-
-
0
tRc( 1)
TYP.
-
-
-
-
-
MAX.
5.5
50
100
-
-
UNIT
V
J.lA
J.lA
J.ls
J.ls
vnD
4. 5V -------------
Data Retention Mode
tCDR
VDD-O.2V
GND
5. If the VIH of ~is 2. 2V in operation. IODSl current flows the period that VDD voltage is going down from 4. 5V to 2.
5V.
- C-61 -

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