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PDF TC5565APL-15L Data sheet ( Hoja de datos )

Número de pieza TC5565APL-15L
Descripción Static RAM
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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No Preview Available ! TC5565APL-15L Hoja de datos, Descripción, Manual

TOSHIBA MOS MEMORY PRODUCT
8.192 WORD X 8 BIT
CMOS STATIC RAM
SILICON GATE CMOS
TC5565APL-10L, TC5565APL-12L, TC5565APL-15L
TC5565AFL-10L, TC5565AFL-12L, TC5565AFL-15L
DESCRIPTION
The TC5565APL/AFL is 65,536 bit static random
access memory organized as 8, 192 words by 8 bits
using CMOS technology, and operates from a single
5V supply. Advanced circuit techniques provide both
high speed and low power features with a maximum
operating current of 5mA/MHz and maximum
access time of 100ns/120ns/150ns. When CE2 is a
logical low or CE1 is a logical high, the device is
placed in I()w power standby mode in which standby
current is 0.6J.lA typically. The TC5565APL/AFL has
three control inputs. Two chip enables (CE1, CE2)
allow for device selection and data retention control,
and an output enable input (OE) provides fast mem-
ory access. Thus the TC5565APL/AFL is suitable for
use in various microprocessor application systems
where high speed, low power, and battery back up
are required.
The TC5565APL/AFL also features pin compati-
bility with the 64k bit EPROM (TMM2764D). RAM
and EPROM are then interchangeable in the same
socket, resulting in flexibility in the definition of the
quantity of RAM versus EPROM in microprocessor
application systems.
The TC5565APL/AFL is offered in a dual-in-line
28 pin standard plastic package.
FEATURES
o Low Power Dissipation
27. 5mW/MHz (MAx.) Operating
o Standby Current: lJ.lA (Max.) Ta=25°C
o Access Time
TC5565APL/AFL-l0L: lOOns (Max.)
TC5565APL/AFL-12L: 120ns (Max.)
TC5565APL/AFL-15L: 150ns (Max.)
PIN CONNECTION (TOP VIEW)
TC5565APL/AFL
64k bit EPROM
TMM2764D
N.C.
Al2
A5
A4
A3
A2
Al
AO
1/01
1/02
1/03
OND
9
VDD
R/W
CE2
A8
A9
All
m;-
AIO
CEI
1/08
1/07
1/06
1/05
1/04
Al2
AO
00
01
02
OND
28 VCC
POM
N.C.
A8
A9
All
OE
AIO
CE
07
18 06
17 05
16 04
15 03
NAMES
'-'
Ao-A12
R/W
OE
CE1, CE2
I/Ol-I/Os
Voo
GND
N. C.
Address Inputs
Read/Write Control Input
Output Enable Input
Chip Enable Inputs
Data Input/Output
Power (+5V)
Ground
No Connection
o 5V Single Power Supply
o Power Down Features: CE2, CE 1
o Fully Static Operation
o Data Retention Supply Voltage: 2.0-5. 5V
o Directly TIL Compatible
: All Inputs and Outputs
o Pin Compatible with 2764 type EPROM
o TC5565APL Family (Package Type)
Package Type
Device Name
600 mil DIP
TC5565APL
300 mil DIP
(Slim Package)
*TC5563APL
Flat Package(SOP)
TC5565AFL
* : See TC5563APL Technical Date.
BLOCK DIAGRAM
- 8-73 -

1 page




TC5565APL-15L pdf
TC5565APl·10l, TC5565APl-12l, TC5565APl-15l
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• READ CYCLE (1)
ADDRESSES
tRe
OE
DOUT
teo2
teal
VIH --
VIL --~~uu~~~________~________~~~~~~~~~~LLu
VIH --
VIL --~~~~~~~______~______~~~~~~~~~~~~
VOH --~----4-~==~=YJ
VOL -
teoE
UNKNOWN
OUTPUT DATA VALID
• WRITE CYCLE 1 (4) (R/W Controlled Write)
ADDRESSES
R/W
twe
twp
tWR
eE2
VIH --
VI L -..L..L..L..I-"--'-':..L.L..I....l-.'-J-J.~
tew
IC---------.I
tew
DOUT
tODW
tDS
VIH --
DATA IN
VI IJ _ _ _ _ _ _ _ _ _ _ _ _~ ~_-_S-T_A-=--B-L_E-_-_-_-JI ~_ _ _ _ _ _ _ __
--.:.. 8-77 -

5 Page










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