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PDF FPF3042 Data sheet ( Hoja de datos )
| Número de pieza | FPF3042 | |
| Descripción | Power-Source-Selector Switch | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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August 2014
FPF3042
IntelliMAX™ 18 V-Rated, Dual-Input, Single-Output,
Power-Source-Selector Switch
Features
Dual-Input, Single-Output Load Switch (DISO)
Input Supply Operating Range:
- 4.0 V~12.4 V at VIN
- 4.0 V~12.4 V at VBUS
Typical RON:
- 95 mΩ at VIN=5 V
- 70 mΩ at VBUS=5 V
Bidirectional Switch for VIN and VBUS
Slew Rate Controlled:
- 50 µs at VIN for < 4.7 µF COUT
- 90 µs at VBUS for < 4.7 µF COUT
Maximum ISW: 2.7 A per Channel
Break-Before-Make Transition
Under-Voltage Lockout (UVLO)
Over-Voltage Lockout (OVLO)
Thermal Shutdown
Logic CMOS IO Meets JESD76 Standard for GPIO
Interface and Related Power Supply Requirements
ESD Protected:
- Human Body Model: >3 kV
- Charged Device Model: >1.5 kV
- IEC 61000-4-2 Air Discharge: >15 kV
- IEC61000-4-2 Contact Discharge: >8 kV
Description
The FPF3042 is an 18 V-rated Dual-Input Single-Output
(DISO) load switch consisting of two channels of slew-
rate-controlled, low-on-resistance, N-channel MOSFET
switches with protection features. The slew-rate-
controlled turn-on characteristic prevents inrush current
and the resulting excessive voltage droop on the input
power rails. The input voltage range operates from 4.0 V
to 12.4 V at both VBUS and VIN to align with the needs of
high-voltage portable device power rails.
Both VIN and VBUS have the over-voltage protection of
14 V (typical) to avoid damage to the system.
VIN and VBUS bidirectional switching allows reverse
current from VOUT to VIN or VBUS for On-The-Go, (OTG)
Mode. The switching is controlled by logic input EN and
VIN_SEL is capable of interfacing directly with low-voltage
control signal General-Purpose Input / Output (GPIO).
FPF3042 is available in 1.76 mm x 1.96 mm Wafer-
Level Chip-Scale Package (WLCSP), 16-bump, 0.4 mm
pitch.
Applications
Input Power-Selection Block Supporting USB and
Wireless Charging
Smart Phone / Tablet PC
Ordering Information
Part Number
Top
Mark
Channel
FPF3042UCX TR
DISO
Typical RON per
Channel at 5 VIN
95 mΩ for VIN
70 mΩ for VBUS
Rise Time (tR)
Package
50 µs for VIN
90 µs for VBUS
16-Bump, 1.76 mm x 1.96 mm,
Wafer-Level Chip-Scale Package
(WLCSP), 0.4 mm Pitch
© 2013 Fairchild Semiconductor Corporation
FPF3042 • Rev. 1.0.1
www.fairchildsemi.com
1 page  
Table 1.
Truth Table
EN VIN>VUVLO VBUS>VUVLO VIN_SEL DF_IN
HIGH
X
X
LOW
X
HIGH
X
X HIGH X
LOW YES
NO HIGH X
LOW
NO
YES
LOW
X
LOW YES
YES
LOW Floating
LOW YES
YES
HIGH LOW
LOW
NO
NO X
Notes:
1. Internal pull-down at EN.
2. 1 µA pull-up current source at DF_IN.
X
Other_VIN_AVA
HI-Z if VIN & VBUS >VUVLO
LOW if VIN or VBUS <VUVLO
HI-Z if VIN & VBUS >VUVLO
LOW if VIN or VBUS <VUVLO
LOW
LOW
HIGH-Z
HIGH-Z
LOW
VOUT
Comment
VBUS
VIN
VOUT is selected by
VIN_SEL
Bidirectional channel
VIN
VBUS
Automatic selection to
valid input
VIN_SEL is output.
VBUS
VIN
VOUT is selected by
DF_IN
VIN_SEL is output.
Floating
OFF
© 2013 Fairchild Semiconductor Corporation
FPF3042 • Rev. 1.0.1
5
www.fairchildsemi.com
5 Page 
Typical Characteristics (Continued)
Figure 23.VOUT tF vs. Temperature
Figure 24.tTRAN vs. Temperature
Figure 25.Power Source Transition (VIN=VBUS=5 V,
EN=HIGH, VIN_SEL=LOWHIGHLOW,
COUT=4.7 µF, RL=150 Ω)
Figure 26.VIN On Response (VIN=GND5 V,
VBUS=EN=GND, COUT=4.7 µF, RL=150 Ω)
Figure 27.VBUS On Response (VBUS=GND5 V,
VIN=EN=GND, COUT=4.7 µF, RL=150 Ω)
Figure 28.Off Response (VIN=VBUS=5 V, EN=HIGH,
VIN_SEL=LOHIGH or HIGHLOW, COUT=4.7 µF,
RL=150 Ω)
Figure 29.VIN Over-Voltage Protection Response
(VIN=5 V15 V, VBUS=5 V, EN=VIN_SEL=HIGH,
COUT=4.7 µF, RL=150 Ω)
Figure 30.VBUS Over-Voltage Protection Response
(VBUS=5 V15 V, VIN=5 V, EN=HIGH,
VIN_SEL=LOW, COUT=4.7 µF, RL=150 Ω)
© 2013 Fairchild Semiconductor Corporation
FPF3042 • Rev. 1.0.1
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet FPF3042.PDF ] | |
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