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PDF FDMS8558SDC Data sheet ( Hoja de datos )

Número de pieza FDMS8558SDC
Descripción MOSFET ( Transistor )
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDMS8558SDC Hoja de datos, Descripción, Manual

FDMS8558SDC
N-Channel PowerTrench® SyncFETTM
July 2013
25 V, 90 A, 1.5 mΩ
Features
„ Dual CoolTM PQFN package
„ Max rDS(on) = 1.5 mΩ at VGS = 10 V, ID = 38 A
„ Max rDS(on) = 1.7 mΩ at VGS = 4.5 V, ID = 36 A
„ High performance technology for extremely low rDS(on)
„ SyncFETTM Schottky Body Diode
„ RoHS Compliant
General Description
This N-Channel SyncFETTM is produced using Fairchild
Semiconductor’s advanced PowerTrench® process.
Advancements in both silicon and package technologies have
been combined to offer the lowest rDS(on) while maintaining
excellent switching performance by extremely low Junction-to-
Ambient thermal resistance. This device has the added benefit
of an efficient monolithic Schottky body diode.
Applications
„ Synchronous Rectifier for DC/DC Converters
„ Telecom Secondary Side Rectification
„ High End Server/Workstation Vcore Low Side
Pin 1
S
S
S
G
D5
D6
4G
3S
D
D
D
D
Top
Power 56
Bottom
D7
D8
2S
1S
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous
-Pulsed
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 3)
(Note 1a)
Ratings
25
12
90
38
140
145
89
3.3
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJC
RθJA
RθJA
RθJA
RθJA
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Top Source)
(Bottom Drain)
(Note 1a)
(Note 1b)
(Note 1i)
(Note 1j)
(Note 1k)
2.8
1.4
38
81
16
23
11
°C/W
Device Marking
09DC
Device
FDMS8558SDC
Package
Power 56
Reel Size
13’’
Tape Width
12 mm
Quantity
3000 units
©2012 Fairchild Semiconductor Corporation
FDMS8558SDC Rev.C2
1
www.fairchildsemi.com

1 page




FDMS8558SDC pdf
Typical Characteristics TJ = 25 °C unless otherwise noted
10
ID = 38 A
8
10000
Ciss
6
VDD = 10 V
VDD = 13 V
4
VDD = 15 V
2
0
0 15 30 45 60 75 90
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
1000
Coss
f = 1 MHz
VGS = 0 V
Crss
100
0.1 1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure8. Capacitance vsDrain
to Source Voltage
30
100
TJ = 25 oC
10
TJ = 100 oC
TJ = 125 oC
1
0.001
0.01 0.1 1 10 100
tAV, TIME IN AVALANCHE (ms)
1000
Figure9. Unclamped Inductive
Switching Capability
1000
100 100 us
10
THIS AREA IS
1 LIMITED BY rDS(on)
SINGLE PULSE
0.1 TJ = MAX RATED
RθJA = 81 oC/W
TA = 25 oC
0.01
0.01 0.1
1
10
VDS, DRAIN to SOURCE VOLTAGE (V)
1 ms
10 ms
100 ms
1s
10 s
DC
100
Figure 11. Forward Bias Safe
Operating Area
200
VGS = 10 V
150
VGS = 4.5 V
100
Limited by Package
50 RθJC = 1.4 oC/W
0
25 50 75 100 125 150
TC, CASE TEMPERATURE (oC)
Figure 10. Maximum Continuous Drain
Current vs Ambient Temperature
10000
1000
100
SINGLE PULSE
RθJA = 81 oC/W
TA = 25 oC
10
1
0.1
10-4 10-3 10-2 10-1
1
10
t, PULSE WIDTH (s)
100 1000
Figure 12. Single Pulse Maximum
Power Dissipation
©2012 Fairchild Semiconductor Corporation
FDMS8558SDC Rev.C2
5
www.fairchildsemi.com

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