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PDF LF156 Data sheet ( Hoja de datos )
| Número de pieza | LF156 | |
| Descripción | Series Monolithic JFET Input Operational Amplifiers | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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December 2001
LF155/LF156/LF256/LF257/LF355/LF356/LF357
JFET Input Operational Amplifiers
General Description
These are the first monolithic JFET input operational ampli-
fiers to incorporate well matched, high voltage JFETs on the
same chip with standard bipolar transistors (BI-FET™ Tech-
nology). These amplifiers feature low input bias and offset
currents/low offset voltage and offset voltage drift, coupled
with offset adjust which does not degrade drift or
common-mode rejection. The devices are also designed for
high slew rate, wide bandwidth, extremely fast settling time,
low voltage and current noise and a low 1/f noise corner.
Features
Advantages
n Replace expensive hybrid and module FET op amps
n Rugged JFETs allow blow-out free handling compared
with MOSFET input devices
n Excellent for low noise applications using either high or
low source impedance — very low 1/f corner
n Offset adjust does not degrade drift or common-mode
rejection as in most monolithic amplifiers
n New output stage allows use of large capacitive loads
(5,000 pF) without stability problems
n Internal compensation and large differential input voltage
capability
Applications
n Precision high speed integrators
n Fast D/A and A/D converters
n High impedance buffers
n Wideband, low noise, low drift amplifiers
n Logarithmic amplifiers
n Photocell amplifiers
n Sample and Hold circuits
Common Features
n Low input bias current: 30pA
n Low Input Offset Current: 3pA
n High input impedance: 1012Ω
n Low input noise current:
n High common-mode rejection ratio:
n Large dc voltage gain: 106 dB
100 dB
Uncommon Features
j Extremely
fast settling
time to
0.01%
j Fast slew
rate
j Wide gain
bandwidth
j Low input
noise
voltage
LF155/
LF355
4
5
2.5
20
LF156/
LF256/
LF356
1.5
12
5
12
LF257/
LF357
(AV=5)
1.5
50
20
12
Units
µs
V/µs
MHz
Simplified Schematic
*3pF in LF357 series.
BI-FET™, BI-FET II™ are trademarks of National Semiconductor Corporation.
© 2001 National Semiconductor Corporation DS005646
00564601
www.national.com
1 page  
Typical DC Performance Characteristics Curves are for LF155 and LF156 unless otherwise
specified. (Continued)
Supply Current
Supply Current
00564641
Negative Current Limit
00564642
Positive Current Limit
00564643
Positive Common-Mode
Input Voltage Limit
00564644
Negative Common-Mode
Input Voltage Limit
00564645
5
00564646
www.national.com
5 Page 
Application Hints (Continued)
reversal of phase to the output. Exceeding the negative
common-mode limit on both inputs will force the amplifier
output to a high state. In neither case does a latch occur
since raising the input back within the common-mode range
again puts the input stage and thus the amplifier in a normal
operating mode.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
These amplifiers will operate with the common-mode input
voltage equal to the positive supply. In fact, the
common-mode voltage can exceed the positive supply by
approximately 100 mV independent of supply voltage and
over the full operating temperature range. The positive sup-
ply can therefore be used as a reference on an input as, for
example, in a supply current monitor and/or limiter.
Precautions should be taken to ensure that the power supply
for the integrated circuit never becomes reversed in polarity
or that the unit is not inadvertently installed backwards in a
socket as an unlimited current surge through the resulting
forward diode within the IC could cause fusing of the internal
conductors and result in a destroyed unit.
All of the bias currents in these amplifiers are set by FET
current sources. The drain currents for the amplifiers are
therefore essentially independent of supply voltage.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order
to ensure stability. For example, resistors from the output to
an input should be placed with the body close to the input to
minimize “pickup” and maximize the frequency of the feed-
back pole by minimizing the capacitance from the input to
ground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance
from the input of the device (usually the inverting input) to AC
ground set the frequency of the pole. In many instances the
frequency of this pole is much greater than the expected 3dB
frequency of the closed loop gain and consequently there is
negligible effect on stability margin. However, if the feedback
pole is less than approximately six times the expected 3 dB
frequency a lead capacitor should be placed from the output
to the input of the op amp. The value of the added capacitor
should be such that the RC time constant of this capacitor
and the resistance it parallels is greater than or equal to the
original feedback pole time constant.
Typical Circuit Connections
VOS Adjustment
00564667
• VOS is adjusted with a 25k potentiometer
• The potentiometer wiper is connected to V+
• For potentiometers with temperature coefficient of 100
ppm/˚C or less the additional drift with adjust is ≈ 0.5µV/
˚C/mV of adjustment
• Typical overall drift: 5µV/˚C ±(0.5µV/˚C/mV of adj.)
Driving Capacitive Loads
00564668
* LF155/6 R = 5k
LF357 R = 1.25k
Due to a unique output stage design, these amplifiers
have the ability to drive large capacitive loads and still
maintain stability. CL(MAX) . 0.01µF.
Overshoot ≤ 20%
Settling time (ts) . 5µs
LF357. A Large Power BW Amplifier
00564615
For distortion ≤ 1% and a 20 Vp-p VOUT swing, power bandwidth is:
500kHz.
11 www.national.com
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet LF156.PDF ] | |
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