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PDF FDD9410_F085 Data sheet ( Hoja de datos )

Número de pieza FDD9410_F085
Descripción MOSFET ( Transistor )
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDD9410_F085 Hoja de datos, Descripción, Manual

October 2014
FDD9410_F085
N-Channel Power Trench® MOSFET
40 V, 50 A, 4.1 mΩ
D
Features
„ Typ rDS(on) = 3.5 mΩ at VGS = 10V, ID = 50 A
„ Typ Qg(tot) = 23.5 nC at VGS = 10V, ID = 50 A
„ UIS Capability
„ RoHS Compliant
„ Qualified to AEC Q101
Applications
„ Automotive Engine Control
„ Powertrain Management
„ Solenoid and Motor Drivers
„ Integrated Starter/alternator
„ Primary Switch for 12V Systems
D
G
G
S
DTO-P-2A5K2
(TO-252)
S
For current package drawing, please refer to the Fairchild web
site  at  https://www.fairchildsemi.com/packagedrawings/TO/
TO252A03.pdf
MOSFET Maximum Ratings TJ = 25°C unless otherwise noted
Symbol
Parameter
VDSS
VGS
ID
Drain to Source Voltage
Gate to Source Voltage
Drain Current - Continuous (VGS=10) (Note 1)
Pulsed Drain Current
EAS Single Pulse Avalanche Energy
PD
Power Dissipation
Derate Above 25oC
TJ, TSTG
RθJC
RθJA
Operating and Storage Temperature
Thermal Resistance Junction to Case
Maximum Thermal Resistance Junction to Ambient
TC = 25°C
TC = 25°C
(Note 2)
(Note 3)
Ratings
40
±20
50
See Figure4
40
75
0.5
-55 to + 175
2
52
Units
V
V
A
mJ
W
W/oC
oC
oC/W
oC/W
Package Marking and Ordering Information
Device Marking
Device
Package
FDD9410
FDD9410_F085 D-PAK(TO-252)
Reel Size
13”
Tape Width
12mm
Quantity
2500 units
Notes:
1: Current is limited by bondwire configuration.
2:
3:
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the solder
maximum
©2014 Fairchild Semiconductor Corporation
FDD9410_F085 Rev. C2
1
www.fairchildsemi.com

1 page




FDD9410_F085 pdf
Typical Characteristics
50
ID = 50A
40
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
30
TJ = 175oC
20
TJ = 25oC
10
0
456789
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. RDSON vs. Gate Voltage
10
1.8
PULSE DURATION = 80μs
1.6 DUTY CYCLE = 0.5% MAX
1.4
1.2
1.0
0.8
0.6
-80
ID = 50A
VGS = 10V
-40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE(oC)
Figure 12. Normalized RDSON vs. Junction
Temperature
1.2
VGS = VDS
1.1 ID = 250μA
1.0
0.9
0.8
0.7
0.6
-80
-40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE(oC)
Figure 13. Normalized Gate Threshold Voltage vs.
Temperature
1.10
ID = 1mA
1.05
1.00
0.95
0.90
-80
-40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE (oC)
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
10000
1000
Ciss
Coss
100
f = 1MHz
Crss
VGS = 0V
10
0.1 1 10 100
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 15. Capacitance vs. Drain to Source
Voltage
10
ID = 50A
8
6
4
VDD = 16V
VDD = 24V
VDD = 20V
2
0
0 5 10 15 20 25
Qg, GATE CHARGE(nC)
Figure 16. Gate Charge vs. Gate to Source
Voltage
FDD9410_F085 Rev. C2
5
www.fairchildsemi.com

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