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PDF FDMC86160ET100 Data sheet ( Hoja de datos )

Número de pieza FDMC86160ET100
Descripción MOSFET ( Transistor )
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDMC86160ET100 Hoja de datos, Descripción, Manual

FDMC86160ET100
N-Channel Shielded Gate PowerTrench® MOSFET
100 V, 43 A, 14 mΩ
January 2015
Features
General Description
„ Extended TJ rating to 175°C
„ Shielded Gate MOSFET Technology
„ Max rDS(on) = 14 mΩ at VGS = 10 V, ID = 9 A
„ Max rDS(on) = 23 mΩ at VGS = 6 V, ID = 7 A
„ High performance technology for extremely low rDS(on)
„ Termination is Lead-free and RoHS Compliant
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process that
incorporates Shielded Gate technology. This process has been
optimized for the on-state resistance. This device is well suited
for applications where ulta low RDS onis required in small
spaces such as High performance VRM, POL and orring
functions.
Applications
„ Bridge Topologies
„ Synchronous Rectifier
Pin 1
Pin 1
S
S
SG
S
S
D
D
D
DD
D
Top Bottom
Power 33
SD
GD
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous
-Continuous
-Continuous
-Pulsed
TC = 25 °C
TC = 100 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 5)
(Note 5)
(Note 1a)
(Note 4)
(Note 3)
(Note 1a)
Ratings
100
±20
43
31
9
204
181
65
2.8
-55 to +175
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1)
(Note 1a)
2.3
53
°C/W
Device Marking
FDMC86160ET
Device
FDMC86160ET100
Package
Power33
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
©2015 Fairchild Semiconductor Corporation
FDMC86160ET100 Rev. C1
1
www.fairchildsemi.com

1 page




FDMC86160ET100 pdf
Typical Characteristics TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.1 0.02
0.01
0.01
SINGLE PULSE
0.001
10-5
10-4
10-3
10-2
PDM
t1
t2
NOTES:
ZθJC(t) = r(t) x RθJC
RθJC = 2.3 °C/W
Peak TJ = PDM x ZθJC(t) + TC
Duty Cycle, D = t1 / t2
10-1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Case Transient Thermal Response Curve
1
©2015 Fairchild Semiconductor Corporation
FDMC86160ET100 Rev.C1
5
www.fairchildsemi.com

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