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PDF FDMT800150DC Data sheet ( Hoja de datos )

Número de pieza FDMT800150DC
Descripción MOSFET ( Transistor )
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDMT800150DC Hoja de datos, Descripción, Manual

July 2015
FDMT800150DC
N-Channel Dual CoolTM 88 PowerTrench® MOSFET
150 V, 99 A, 6.5 mΩ
Features
„ Max rDS(on) = 6.5 mΩ at VGS = 10 V, ID = 15 A
„ Max rDS(on) = 8.4 mΩ at VGS = 6 V, ID = 13 A
„ Advanced Package and Silicon combination for low rDS(on)
and high efficiency
„ Next generation enhanced body diode technology,
engineered for soft recovery
„ Low profile 8x8mm MLP package
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process.
Advancements in both silicon and Dual CoolTM package
technologies have been combined to offer the lowest rDS(on)
while maintaining excellent switching performance by extremely
low Junction-to-Ambient thermal resistance.
Applications
„ MSL1 robust package design
„ OringFET / Load Switching
„ 100% UIL tested
„ Synchronous Rectification
„ RoHS Compliant
„ DC-DC Conversion
Pin 1
Pin 1
G
S
S
G
S
SS
D
D
D
D
D
D
Top
Dual CoolTM 88
Bottom
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
-Continuous
-Pulsed
TC = 25 °C
TC = 100 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
S
S
(Note 5)
(Note 5)
(Note 1a)
(Note 4)
(Note 3)
(Note 1a)
D
D
Ratings
150
±20
99
62
15
561
1093
156
3.2
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJC
RθJA
RθJA
RθJA
RθJA
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Top Source)
(Bottom Drain)
(Note 1a)
(Note 1b)
(Note 1i)
(Note 1j)
(Note 1k)
1.6
0.8
38
81
15
21
9
°C/W
Device Marking
800150DC
Device
FDMT800150DC
©2015 Fairchild Semiconductor Corporation
FDMT800150DC Rev. 1.1
Package
Dual CoolTM 88
1
Reel Size
Tape Width
13.3 mm
Quantity
3000 units
www.fairchildsemi.com

1 page




FDMT800150DC pdf
Typical Characteristics TJ = 25 °C unless otherwise noted
10
ID = 15 A
8
6
4
VDD = 50 V
VDD = 75 V
VDD = 100 V
2
0
0 16 32 48 64 80
Qg, GATE CHARGE (nC)
10000
1000
Ciss
Coss
100
Crss
f = 1 MHz
VGS = 0 V
10
0.1
1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
100
Figure 7. Gate Charge Characteristics
Figure8. CapacitancevsDrain
to Source Voltage
100
TJ = 25 oC
120
RθJC = 0.8 oC/W
90
TJ = 100 oC
10 60
VGS = 10 V
TJ = 125 oC
VGS = 6 V
30
1
0.01
0.1 1 10 100
tAV, TIME IN AVALANCHE (ms)
Figure9. Unclamped Inductive
Switching Capability
700
1000
100 10 μs
10 THIS AREA IS
LIMITED BY rDS(on)
100 μs
SINGLE PULSE
1 TJ = MAX RATED
RθJC = 0.8 oC/W
TC = 25 oC
0.1
0.1 1
1 ms
CURVE BENT TO
MEASURED DATA
10 ms
DC
10 100 600
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
0
25 50 75 100 125
TC, CASE TEMPERATURE (oC)
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
150
50000
10000
1000
100 SINGLE PULSE
RθJC = 0.8 oC/W
TC = 25 oC
10
10-5
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
Figure 12. Single Pulse Maximum
Power Dissipation
1
©2015 Fairchild Semiconductor Corporation
FDMT800150DC Rev. 1.1
5
www.fairchildsemi.com

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