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PDF FDMD8280 Data sheet ( Hoja de datos )
| Número de pieza | FDMD8280 | |
| Descripción | MOSFET ( Transistor ) | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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October 2014
FDMD8280
Dual N-Channel Power Trench® MOSFET
80 V, 40 A, 8.2 mΩ
Features
General Description
Max rDS(on) = 8.2 mΩ at VGS = 10 V, ID = 11 A
Max rDS(on) = 11 mΩ at VGS = 8 V, ID = 9.5 A
Ideal for flexible layout in primary side of bridge topology
Termination is Lead-free and RoHS Compliant
100% UIL tested
Kelvin High Side MOSFET drive pin-out capability
This device includes two 80V N-Channel MOSFETs in a dual
Power (3.3 mm X 5 mm) package. HS source and LS Drain
internally connected for half/full bridge, low source inductance
package, low rDS(on)/Qg FOM silicon.
Applications
Synchronous Buck : Primary Switch of Half / Full bridge
converter for telecom
Motor Bridge : Primary Switch of Half / Full bridge converter
for BLDC motor
MV POL : 48V Synchronous Buck Switch
Pin 1
Power 3.3 x 5
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
Drain Current -Continuous
-Pulsed
Parameter
TC = 25 °C
TA = 25 °C
EAS
PD
TJ, TSTG
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
D1 1
D1 2
D1 3
G2 4
S2 5
S2 6
(Note 1a)
(Note 4)
(Note 3)
(Note 1a)
(Note 1b)
12 G1
11 G1R
10 D2/S1
9 D2/S1
8 D2/S1
7 D2/S1
Ratings
80
±20
40
11
160
150
38
2.1
1
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJA
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
(Note 1b)
3.3
60
130
°C/W
Device Marking
8280
Device
FDMD8280
Package
Power 3.3 x 5
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
©2014 Fairchild Semiconductor Corporation
FDMD8280 Rev.C
1
www.fairchildsemi.com
1 page  
Typical Characteristics TJ = 25 °C unless otherwise noted
2
1 DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1 0.1
0.05
0.02
0.01
0.01
SINGLE PULSE
PDM
t1
t2
NOTES:
ZθJC(t)
RθJC =
=3.r3(to)Cx/WRθJC
Peak TJ = PDM x ZθJC(t) + TC
Duty Cycle, D = t1 / t2
0.001
10-5
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Case Transient Thermal Response Curve
1
©2014 Fairchild Semiconductor Corporation
FDMD8280 Rev.C
5
www.fairchildsemi.com
5 Page | ||
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| PDF Descargar | [ Datasheet FDMD8280.PDF ] | |
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