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PDF TA2024C Data sheet ( Hoja de datos )
| Número de pieza | TA2024C | |
| Descripción | STEREO 15W CLASS-T DIGITAL AUDIO AMPLIFIER | |
| Fabricantes | TRIPATH | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TA2024C (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
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Tripath Technology, Inc. - Technical Information
TA 2 0 2 4 C
STEREO 15W (4Ω) CLASS-T™ DIGITAL AUDIO AMPLIFIER USING
DIGITAL POWER PROCESSING™ TECHNOLOGY
Preliminary Information
Revision 1.1 – September 2006
GENERAL DESCRIPTION
The TA2024C is a 15W/ch continuous average two-channel Class-T Digital Audio Power Amplifier IC
using Tripath’s proprietary Digital Power Processing™ technology. Class-T amplifiers offer both the
audio fidelity of Class-AB and the power efficiency of Class-D amplifiers.
The TA2024C has incorporated specific changes to improve the click and pop performance over
previous devices such as TA2024 and TA2024B. The TA2024C is recommended for all new designs
that previously used the TA2024 or TA2024B.
APPLICATIONS
Computer/PC Multimedia
DVD Players
Cable Set-Top Products
Televisions
Video CD Players
Battery Powered Systems
BENEFITS
Fully integrated solution with FETs
Easier to design-in than Class-D
Reduced system cost with no heat sink
Dramatically improves efficiency versus Class-
AB
Signal fidelity equal to high quality linear
amplifiers
High dynamic range compatible with digital
media such as CD, DVD, and Internet audio
TYPICAL PERFORMANCE
FEATURES
Class-T architecture
Single Supply Operation
“Audiophile” Quality Sound
0.03% THD+N @ 9W, 4Ω
0.10% IHF-IM @ 1W, 4Ω
11W @ 4Ω, 0.1% THD+N
6W @ 8Ω, 0.1% THD+N
High Power
15W @ 4Ω, 10% THD+N
10W @ 8Ω, 10% THD+N
High Efficiency
81% @ 15W, 4Ω
90% @ 10W, 8Ω
Dynamic Range = 98 dB
Mute and Sleep inputs
Enhanced Turn-on & turn-off pop
suppression
Over-current protection
Over-temperature protection
Bridged outputs
36-pin Power SOP package
1 TA2024C –KLi/1.1/09.06
1 page  
Tripath Technology, Inc. - Technical Information
APPLICATION /TEST CIRCUIT
CI
2.2uF
+
OAOUT1
RF
20KΩ
RI
20KΩ
INV1
10
11
CA
0.1uF
(Pin 8)
BIASCAP 16
5V
MUTE 12
5V
CI
2.2uF
+
OAOUT2 14
RF
20KΩ
RI
20KΩ
INV2 15
6
(Pin 8)
RREF
8.25KΩ, 1%
REF
3 DCAP1
+12V
1MΩ
CD
0.1uF
2 DCAP2
18 SLEEP
0.1uF
CS
0.1uF
To Pin 1
CS
0.1uF
4 V5D
5 AGND1
9 V5A
8 AGND2
17 AGND3
13
21
23 NC
32
34
TA2024C
Processing
&
Modulation
Processing
&
Modulation
VDD1
31 OUTP1
Lo
10uH, 2A
PGND1
VDD1
DO
(Pin 35)
(Pin 35)
28 OUTM1
Lo
10uH, 2A
*Co
0.47uF
*Co
0.47uF
CZ
0.22uF
RZ
10Ω, 1/2W
CDO
0.01uF
PGND1
19
7
VDD2
DO
(Pin 35)
FAULT
OVERLOADB
24 OUTP2
Lo
10uH, 2A
PGND2
VDD2
DO
(Pin 20)
(Pin 20)
Lo
27 OUTM2 10uH, 2A
*Co
0.47uF
CZ
0.22uF
*Co
0.47uF
RZ
10Ω, 1/2W
CDO
0.01uF
PGND2
DO
(Pin 20)
CPUMP 36
5V
VDDA 33
+ CP
1uF
DGND 22
+5VGEN 1
CS
0.1uF
CS
0.1uF
To Pins 4,9
VDD1 30
VDD1 29
PGND1 35
CSW
0.1uF
+
CSW
180uF, 16V
VDD (+12V)
VDD2 25
VDD2 26
PGND2 20
CSW
0.1uF
+ CSW
180uF, 16V
RL
4Ω or *8Ω
RL
4Ω or *8Ω
Note: Analog and Digital/Power Grounds must
be connected locally at the TA2024B
Analog Ground
Digital/Power Ground
All Diodes Motorola MBRS130T3
* Use Co = 0.22µF for 8 Ohm loads
5 TA2024C –KLi/1.1/09.06
5 Page 
Tripath Technology, Inc. - Technical Information
In most cases, the pop caused by the output offset is not objectionable. But in those cases that
there is concern about the residual pop, the offset can be nulled. There are several ways to trim
the offset. These include using a trim pot, with current limiting resistor, using an active DC servo
comprised of op-amps, resistors and switches, and finally, a look-up table of resistor values
attached to the input. The last scheme is implemented on the EB-TA2024C. Please refer to the
EB-TA2024C document at www.tripath.com for additional information on this circuit.
Please note that while a DC servo is automatic, and thus, does not require manual adjustment, it
is not the best solution. This is because the DC servo has to be slow enough so as not to react to
low frequency audio signals. Thus, it is not possible for such a circuit to eliminate a mute off pop
caused by DC offset. The servo is effective for eliminating mute on pops, since the DC offset
would be nulled to zero by the time the TA2024C is muted. A DC servo, in conjunction, with a
relay is an effective method for completely eliminating mute off and mute on pops, but due to the
small residual pop caused by the TA2024C offset, it is unlikely that such a sophisticated scheme
would be implemented for high-volume production designs.
Output Voltage Offset
The DC offset voltages that appear at the speaker terminals of a TA2024C amplifier are typically
small and for most applications no DC offset correction is necessary. The TA2024C is 100%
tested to ensure that the differential output DC offset voltage is less than +/-150mV. However
this DC offset can cause a small turn on and turn off pop, depending on the offset value for that
specific IC. Every TA2024C IC will have a different offset voltage for each channel.
If the output offset is deemed unacceptable from a turn on/off pop standpoint, there are three
recommended methods for correcting it. These methods of trimming the offset voltage are
optional and for most cases the additional circuitry is not needed.
1) A potentiometer can be used at the input of the TA2024C as shown in the figure below. By
changing the input bias voltage the output DC offset voltage can be trimmed. Two separate
potentiometers must be used to trim both channels.
OAOUT1 29
CI
2.2uF
+
RI
RF
20KΩ
20KΩ
INV1 30
V5A (pin 28)
ROFB
1MΩ
ROFA
10KΩ
Offset Trim
Potentiometer
COF
0.1uF
TA2024C
OAOUT2 1
CI
2.2uF
+
RI
20KΩ
RF
20KΩ
INV2 2
V5A (pin 28)
ROFB
1MΩ
ROFA
10KΩ
Offset Trim
Potentiometer
COF
0.1uF
11 TA2024C –KLi/1.1/09.06
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet TA2024C.PDF ] | |
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