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PDF CD4017BMS Data sheet ( Hoja de datos )
| Número de pieza | CD4017BMS | |
| Descripción | CMOS Counter/Dividers | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Data Sheet
CD4017BMS, CD4022BMS
August 1998
File Number 3297
CMOS Counter/Dividers
CD4017BMS - Decade Counter with 10 Decoded Outputs
CD4022BMS - Octal Counter with 8 Decoded Outputs
CD4017BMS and CD4022BMS are 5-stage and 4-stage
Johnson counters having 10 and 8 decoded outputs, respec-
tively. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT
signal. Schmitt trigger action in the CLOCK input circuit provides
pulse shaping that allows unlimited clock input pulse rise and fall
times.
These counters are advanced one count at the positive clock sig-
nal transition if the CLOCK INHIBIT signal is low. Counter
advancement via the clock line is inhibited when the CLOCK
INHIBIT signal is high. A high RESET signal clears the counter to
its zero count. Use of the Johnson counter configuration permits
high speed operation, 2-input decode gating and spike-free
decoded outputs. Anti-lock gating is provided, thus assuring
proper counter sequence. The decoded output are normally low
and go high only at their respective decoded time slot. Each
decoded output remains high for one full clock cycle. A CARRY-
OUT signal completes one cycle every 10 clock input cycles in
the CD4017BMS or every 8 clock input cycles in the
CD4022BMS and is used to ripple-clock the succeeding device
in a multi-device counting chain.
The CD4017BMS and CD4022BMS series types are supplied in
these 16 lead outline packages
Braze Seal DIP
*H4W †H4X
Frit Seal DIP
*H1F †H1E
Ceramic Flatpack H6W
*CD4017B Only † CD4022B Only
Functional Diagrams
CD4017BMS
CLOCK
CLOCK INHIBIT
RESET
VCC = 16
VSS = 8
14 3 “0”
13 2 “1”
15 4 “2”
7 “3” DECODED
10 “4” DECIMAL
1 “5” OUT
5 “6”
6 “7”
9 “8”
11 “9”
12
CARRY OUT
CD4022BMS
CLOCK
CLOCK INHIBIT
RESET
14
13
15
VCC = 16
VSS = 8
2 “0”
1 “1”
3 “2”
7 “3” DECODED
11 “4” OUT
4 “5”
5 “6”
10 “7”
12
CARRY OUT
Features
• High Voltage Types (20V Rating)
• Fully Static Operation
• Medium-Speed Operation 10MHz (Typ) at VDD = 10V
• Standardized Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
Number 13A, “Standard Specifications for Description
of ‘B’ Series CMOS Devices”
Applications
• Decade Counter/Decimal Decode Display (CD4017BMS)
• Binary Counter/Decoder
• Frequency Division
• Counter Control/Timers
• Divide-by-N Counting
• For Further Application Information, See ICAN-6166
“COS/MOS MSI Counter and Register Design and
Applications”
Pinouts
CD4017BMS
TOP VIEW
NC = NO
CONNECTION
51
12
03
24
65
76
37
VSS 8
16 VDD
15 RESET
14 CLOCK
13 CLOCK INHIBIT
12 CARRY OUT
11 9
10 4
98
CD4022BMS
TOP VIEW
NC = NO
CONNECTION
11
02
23
54
65
NC 6
37
VSS 8
16 VDD
15 RESET
14 CLOCK
13 CLOCK INHIBIT
12 CARRY OUT
11 4
10 7
9 NC
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1 page  
CD4017BMS, CD4022BMS
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Initial Test (Pre Burn-In)
100% 5004
1, 7, 9
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
Interim Test 2 (Post Burn-In)
100% 5004
1, 7, 9
PDA (Note 1)
100% 5004
1, 7, 9, Deltas
Interim Test 3 (Post Burn-In)
100% 5004
1, 7, 9
PDA (Note 1)
100% 5004
1, 7, 9, Deltas
Final Test
100% 5004
2, 3, 8A, 8B, 10, 11
Group A
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Group D
Sample 5005
1, 2, 3, 8A, 8B, 9
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
READ AND RECORD
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
CONFORMANCE GROUPS
Group E Subgroup 2
TABLE 7. TOTAL DOSE IRRADIATION
MIL-STD-883
METHOD
TEST
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
READ AND RECORD
PRE-IRRAD
POST-IRRAD
1, 9 Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
9V ± -0.5V
50kHz
25kHz
PART NUMBER CD4017BMS AND CD4002B
Static Burn-In 1
1 - 7, 9 - 12
8, 13, 15
14, 16
-
-
-
Note 1
Static Burn-In 2
1 - 7, 9 - 12
8, 14
13, 15, 16
-
-
-
Note 1
Dynamic Burn-
In Note 1
-
8, 13, 15
16 1 - 7, 9 - 12 14
-
Irradiation
1 - 7, 9 - 12
8
13 - 16
-
-
-
Note 2
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ±
0.5V
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet CD4017BMS.PDF ] | |
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