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PDF CD40175BC Data sheet ( Hoja de datos )

Número de pieza CD40175BC
Descripción Hex/Quad D Flip-Flop
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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No Preview Available ! CD40175BC Hoja de datos, Descripción, Manual

February 1988
CD40174BM CD40174BC Hex D Flip-Flop
CD40175BM CD40175BC Quad D Flip-Flop
General Description
The CD40174B consists of six positive-edge triggered
D-type flip-flops the true outputs from each flip-flop are ex-
ternally available The CD40175B consists of four positive-
edge triggered D-type flip-flops both the true and comple-
ment outputs from each flip-flop are externally available
All flip-flops are controlled by a common clock and a com-
mon clear Information at the D inputs meeting the set-up
time requirements is transferred to the Q outputs on the
positive-going edge of the clock pulse The clearing opera-
tion enabled by a negative pulse at Clear input clears all Q
outputs to logical ‘‘0’’ and Qs (CD40175B only) to logical ‘‘1’’
All inputs are protected from static discharge by diode
clamps to VDD and VSS
Features
Y Wide supply voltage range
3V to 15V
Y High noise immunity
Y Low power TTL
compatibility
0 45 VDD (typ )
fan out of 2 driving 74L
or 1 driving 74 LS
Y Equivalent to MC14174B MC14175B
Y Equivalent to MM74C174 MM74C175
Connection Diagrams
CD40174B
Dual-In-Line Package
CD40175B
Dual-In-Line Package
Truth Table
Top View
TL F 5987 – 1
Order Number CD40174B or CD40175B
Top View
Inputs
Outputs
Clear
Clock
D
Q
Q
L
X
XL
H
H u HH L
H u LL H
H H X NC NC
H L X NC NC
H e High level
L e Low level
X e Irrelevant
u e Transition from low to high level
NC e No change
e Q for CD40175B only
TL F 5987 – 2
C1995 National Semiconductor Corporation TL F 5987
RRD-B30M105 Printed in U S A

1 page




CD40175BC pdf
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number CD40174BMJ CD40174BCJ CD40175BMJ or CD40175BCJ
NS Package Number J16A
5

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