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PDF NLSV4T3144 Data sheet ( Hoja de datos )

Número de pieza NLSV4T3144
Descripción 4-Bit Dual-Supply Non-Inverting Level Translator
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NLSV4T3144
4-Bit Dual-Supply
Non-Inverting Level
Translator
The NLSV4T3144 is a 4−bit configurable dual−supply bus buffer
level translator. The input (IN_xn) and output (OUT_xn) ports are
designed to track two different power supply rails, VCCA and VCCB
respectively. Both supply rails are configurable from 1.6 V to 3.6 V
allowing low−voltage translation from the input to the output port.
Features
Wide VCCA and VCCB Operating Range: 1.6 V to 3.6 V
High−Speed w/ Balanced Propagation Delay
Inputs and Outputs have OVT Protection to 5.5 V
Outputs at 3−State until Active VCCA and VCCB are Reached
Power−Off Protection
Ultra−Small Packaging: 1.7 mm x 2.0 mm UQFN−12
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
Mobile Phones, PDAs, Other Portable Devices
SPIt Bus Voltage Translation
Important Information
ESD Protection for All Pins:
HBM (Human Body Model) > 3000 V
VCCA
VCCB
IN_A1
IN_A2
IN_A3
OUT_A4
OE
Figure 1. Logic Diagram
OUT_B1
OUT_B2
OUT_B3
IN_B4
GND
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1
UQFN12
MU SUFFIX
CASE 523AE
MARKING DIAGRAM
WG MG
G
WG = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENTS
OE
VCCA 1 12 11 VCCB
IN_A1 2
10 OUT_B1
IN_A2 3
9 OUT_B2
IN_A3 4
8 OUT_B3
OUT_A4 5 6 7 IN_B4
GND
(Top View)
ORDERING INFORMATION
Device
Package Shipping
NLSV4T3144MUTAG UQFN−12 3000/Tape &
(Pb−Free)
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2015
June, 2015 − Rev. 1
1
Publication Order Number:
NLSV4T3144/D

1 page




NLSV4T3144 pdf
NLSV4T3144
DC ELECTRICAL CHARACTERISTICS
−405C to + 855C
Symbol
IIN
Parameter
Input Leakage Current
IOZ I/O Tri*State Output
Leakage Current
Test Conditions
VIN_A1 = VIN_A2 = VIN_A3 =
VCCA or GND;
VIN_B4 = VCCB or GND
TA = 25_C, OE = VCCA
VCCA (V)
VCCB
VCCB (V)
1.6 – 3.6
VCCB
1.6 – 3.6
Min
−1.0
Max Unit
+1.0 mA
1.0 mA
ICCA
Quiescent Supply Current
VIN_A1 = VIN_A2 = VIN_A3 =
VCCA or GND;
VIN_B4 = VCCB or GND
OE = GND, IO = 0
VCCB
1.6 – 3.6
3.0
ICCB
Quiescent Supply Current
VIN_A1 = VIN_A2 = VIN_A3 =
VCCA or GND;
VIN_B4 = VCCB or GND
OE = GND, IO = 0
VCCB
1.6 – 3.6
3.0
ICCA + ICCB
Quiescent Supply Current
VIN_A1 = VIN_A2 = VIN_A3 =
VCCA or GND;
VIN_B4 = VCCB or GND
OE = GND, IO = 0
VCCB
1.6 – 3.6
6.0
NOTE: Connect ground before applying supply voltage VCCA or VCCB. This device is designed with the feature that the power−up
sequence of VCCA and VCCB will not damage the IC.
mA
mA
mA
AC ELECTRICAL CHARACTERISTICS
−405C to +855C
VCCB (V)
3.6 2.8 1.6
Symbol
tPLH, tPHL
Propagation
Delay,
Parameter
Input to Output
VCCA (V) Min Max Min Max Min Max
3.6 3
2.8 3.1 3.3
1.6 4.3 4.5 6.1
Unit
ns
tPZH, tPZL
Output Enable,
OE to Output
3.6 8.7
ns
2.8 10.3 10.7
1.6
17.2 18
20
tPHZ, tPLZ
Output
Disable,
OE to Output
3.6 7.8
ns
2.8 8.2 8.4
1.6 9.5 9.8 10.5
tOSHL,
tOSLH
Output to Output Skew
3.6 0.25
2.8 0.25 0.25
ns
NOTE: Propagation delays defined per Figure 3.
1.6 0.25 0.25 0.25
CAPACITANCE
Symbol
Parameter
CI Control Pin (OE) Input Capacitance
CIN Input Pin Capacitance
COUT
Output Pin Capacitance
CPD Power Dissipation Capacitance
1. Typical values are at TA = +25°C.
Test Conditions
VCCA = VCCB = 3.3 V, VI = 0 V or VCCA/B
VCCA = VCCB = 3.3 V, VI = 0 V or VCCA/B
VCCA = VCCB = 3.3 V, VI = 0 V or VCCA/B
VCCA = VCC2 = 3.3 V, VI = 0 V or 3.3 V, f = 10 MHz
Typ (Note 1)
3.5
5.0
5.0
10
Unit
pF
pF
pF
pF
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