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PDF STP12N120K5 Data sheet ( Hoja de datos )

Número de pieza STP12N120K5
Descripción N-CHANNEL Power MOS MOSFET
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! STP12N120K5 Hoja de datos, Descripción, Manual

STH12N120K5-2, STP12N120K5,
STW12N120K5, STWA12N120K5
N-channel 1200 V, 0.62 Ω typ.,12 A MDmesh K5 Power MOSFETs
in H²PAK-2, TO-220, TO-247 and TO-247 long leads
Datasheet - production data
H 2PAK-2
TO-220
Features
Order codes
VDS RDS(on) max. ID PTOT
STH12N120K5-2
STP12N120K5
1200 V
STW12N120K5
0.69 Ω
12 A 250 W
STWA12N120K5
TO-247
3
2
1
3
2
1
TO-247 long leads
Figure 1: Internal schematic diagram
D(TAB)
D(2, TAB)
G(1)
G(1)
S(2, 3)
(H 2PAK-2)
S(3)
( TO-220, TO-247 and
TO-247 long leads)
Worldwide best FOM (figure of merit)
Ultra-low gate charge
100% avalanche tested
Zener-protected
Applications
Switching applications
Description
These very high voltage N-channel Power
MOSFETs are designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
charge for applications requiring superior power
density and high efficiency.
Order code
STH12N120K5-2
STP12N120K5
STW12N120K5
STWA12N120K5
Table 1: Device summary
Marking
Package
H2PAK-2
12N120K5
TO-220
TO-247
TO-247 long leads
Packing
Tape and reel
Tube
April 2015
DocID022133 Rev 4
This is information on a product in full production.
1/21
www.st.com

1 page




STP12N120K5 pdf
STH12N120K5-2, STP12N120K5,
STW12N120K5, STWA12N120K5
Symbol
td(on)
tr
td(off)
tf
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6: Switching times
Test conditions
VDD = 600 V, ID = 6 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 20: "Unclamped
inductive load test circuit")
Electrical characteristics
Min.
-
-
-
-
Typ.
23
11
68.5
18.5
Max.
-
-
-
-
Unit
ns
ns
ns
ns
Symbol
ISD
ISDM
VSD(1)
trr
Qrr
IRRM
trr
Qrr
IRRM
Parameter
Source-drain current
Source-drain current
(pulsed)
Forward on voltage
Reverse recovery
time
Reverse recovery
charge
Reverse recovery
current
Reverse recovery
time
Reverse recovery
charge
Reverse recovery
current
Table 7: Source drain diode
Test conditions
ISD = 12 A, VGS = 0 V
ISD = 12 A, VDD = 60 V
di/dt = 100 A/µs,
(see Figure 19: "Test circuit
for inductive load switching
and diode recovery times")
ISD = 12 A,VDD = 60 V
di/dt = 100 A/µs,
Tj = 150 °C
(see Figure 19: "Test circuit
for inductive load switching
and diode recovery times")
Notes:
(1)Pulsed: pulse duration = 300µs, duty cycle 1.5%
Min. Typ. Max. Unit
- 12 A
- 48 A
- 1.5 V
- 630
ns
- 12.6
µC
- 40
A
- 892
ns
- 15.6
µC
- 35
A
Symbol
V(BR)GSO
Table 8: Gate-source Zener diode
Parameter
Test conditions
Min
Gate-source
breakdown voltage
IGS = ±1 mA, ID = 0 A
30
Typ. Max.
-
Unit
V
The built-in back-to-back Zener diodes have been specifically designed to enhance the
ESD capability of the device. The Zener voltage is appropriate for efficient and cost-
effective intervention to protect the device integrity. These integrated Zener diodes thus
eliminate the need for external components.
DocID022133 Rev 4
5/21

5 Page





STP12N120K5 arduino
STH12N120K5-2, STP12N120K5,
STW12N120K5, STWA12N120K5
4.1 H²PAK-2 package information
Figure 23: H²PAK-2 package outline
Package information
DocID022133 Rev 4
8159712_D
11/21

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