PDF ICS932S805C Data sheet ( Hoja de datos )

Número de pieza	ICS932S805C
Descripción	K8 Clock Chip
Fabricantes	IDT
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No Preview Available ! K8 Clock Chip for Serverworks HT2100 Servers DATASHEET ICS932S805C Recommended Application: Serverworks HT2100-based systems using AMD K8 processors Output Features: • 7 - Pairs of AMD K8 clocks • 6 - Pair of SRC/PCI Express* clock • 3 - 14.318 MHz REF clocks • 3 - 48MHz clocks • 2 - PCI 33 MHz clocks • 2 - 25MHz clocks Features: • Spread Spectrum for EMI reduction • Outputs may be disabled via SMBus • M/N programming via SMBus Functionality Bit2 Bit1 Bit0 CPU FS2 FS1 FS0 (MHz) 000 001 010 011 100 101 110 111 Power Groups Hi-Z X/4 180.00 220.00 100.00 133.33 166.67 200.00 Pin Number VDD 8 64 15 21,24 31, 39 55, 49, 41 3 GND 12 61 18 22 32 54, 48, 40 7 Description 48MHz Clocks 25MHz Clocks 33 MHz PCI Clocks IREF, Analog Core SRC clocks K8 CPU Clocks REF Clocks, Xtal Osc. Pin Configuration: X1 1 64 VDD25MHz X2 2 63 25MHz_0 VDDREF 3 FS0/REF0 4 62 25MHz_1 61 GND25MHz FS1/REF1 5 60 SPREAD_EN FS2/REF2 6 59 CPUCLK8T6 GNDREF 7 58 CPUCLK8C6 VDD48 8 57 CPUCLK8T5 48MHz_0 9 56 CPUCLK8C5 48MHz_1 10 55 VDDCPU 48MHz_2 11 54 GND GND48 12 SCLK 13 SDATA 14 VDDPCI 15 *FS3/PCICLK0 16 PCICLK1 17 53 CPUCLK8T4 52 CPUCLK8C4 51 CPUCLK8T3 50 CPUCLK8C3 49 VDDCPU 48 GND GNDPCI 18 47 CPUCLK8T2 PD# 19 46 CPUCLK8C2 GND 20 45 CPUCLK8T1 VDDA 21 44 CPUCLK8C1 GNDA 22 43 CPUCLK8T0 IREF 23 42 CPUCLK8C0 VDDA 24 41 VDDCPU SRCCLKT0 25 40 GND SRCCLKC0 26 SRCCLKT1 27 39 VDDSRC 38 SRCCLKT5 SRCCLKC1 28 37 SRCCLKC5 SRCCLKT2 29 36 SRCCLKT4 SRCCLKC2 30 35 SRCCLKC4 VDDSRC 31 34 SRCCLKT3 GNDSRC 32 33 SRCCLKC3 64-TSSOP Internal Pull-Up Resistor ** Internal Pull-Down Resistor IDT® K8 Clock Chip for Serverworks HT2100 Servers 1 1131D – 05/04/10 1 page ICS932S805C K8 Clock Chip for Serverworks HT2100 Servers CPU Divider Ratios Divider (3:2) Bit 00 01 10 11 MSB 00 0000 4 0100 8 1000 16 1100 32 01 0001 3 0101 6 1001 12 1101 24 10 0010 5 0110 10 1010 20 1110 40 11 0011 15 0111 30 1011 60 1111 120 LSB Address Div Address Div Address Div Address Div PCI Divider Ratios Divider (3:2) Bit 00 01 10 11 MSB 00 0000 4 0100 8 1000 16 1100 32 01 0001 3 0101 6 1001 12 1101 24 10 0010 5 0110 10 1010 20 1110 40 11 0011 15 0111 30 1011 60 1111 120 LSB Address Div Address Div Address Div Address Div SRC Divider Ratios Divider (3:2) Bit 00 01 10 11 MSB 00 0000 2 0100 4 1000 8 1100 16 01 0001 3 0101 6 1001 12 1101 24 10 0010 5 0110 10 1010 20 1110 40 11 0011 7 0111 14 1011 28 1111 56 LSB Address Div Address Div Address Div Address Div IDT® K8 Clock Chip for Serverworks HT2100 Servers 5 1131D – 05/04/10 5 Page ICS932S805C K8 Clock Chip for Serverworks HT2100 Servers SMBus Table: CPU/SRC Spread Spectrum Control Register Byte 18 Pin # Name Control Function Bit 7 - Reserved Reserved Bit 6 - SSP14 Bit 5 - SSP13 Bit 4 Bit 3 Bit 2 - - - SSP12 SSP11 SSP10 Spread Spectrum Programming bit(14:8) Bit 1 - SSP9 Bit 0 - SSP8 Type 0 1 R- - RW RW These Spread Spectrum bits RW in Byte 17 and 18 will RW program the spread RW pecentage of CPU and SRC RW outputs. RW PWD 0 X X X X X X X SMBus Table: SRC Spread Spectrum Control Register Byte 18 Pin # Name Control Function Bit 7 - Reserved Reserved Bit 6 - Reserved Reserved Bit 5 - Reserved Reserved Bit 4 - Reserved Reserved Bit 3 - Reserved Reserved Bit 2 - Reserved Reserved Bit 1 - Reserved Reserved Bit 0 - Reserved Reserved Type R R R R R R R R 0 - - - - - - - - 1 PWD -0 -0 -0 -0 -0 -0 -0 -0 SMBus Table: Programmable Output Divider Register Byte 19 Pin # Name Control Function Bit 7 - CPUDiv3 Bit 6 Bit 5 - - CPUDiv2 CPUDiv1 CPU Divider Ratio Programming Bits Bit 4 - CPUDiv0 Bit 3 - Reserved Reserved Bit 2 - Reserved Reserved Bit 1 - Reserved Reserved Bit 0 - Reserved Reserved Type RW RW RW RW R R R R 01 See CPU Divider Ratios Table -- -- -- -- PWD X X X X 0 0 0 0 SMBus Table: Programmable Output Divider Register Byte 20 Pin # Name Control Function Type Bit 7 - 33MHzDiv3 RW Bit 6 - 33MHzDiv2 33MHz Divider Ratio Programming RW Bit 5 - 33MHzDiv1 Bits RW Bit 4 - 33MHzDiv0 RW Bit 3 - SRC_Div3 RW Bit 2 Bit 1 - - SRC_Div2 SRC_Div1 SRC_ Divider Ratio Programming Bits RW RW Bit 0 - SRC_Div0 RW 01 33MHz Divider Ratio Table SRC Divider Ratio Table PWD X X X X X X X X SMBusTable: Reserved Regsiter Byte 21 is reserved do not write this register! IDT® K8 Clock Chip for Serverworks HT2100 Servers 11 1131D – 05/04/10 11 Page

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