PDF ICS932S421B Data sheet ( Hoja de datos )

Número de pieza	ICS932S421B
Descripción	PCIe Gen2 and QPI Clock
Fabricantes	IDT
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DATASHEET PCIe Gen2 and QPI Clock for Intel-Based Servers ICS932S421B Recommended Application: PCIe Gen 2 & QPI compliant CK410B+ clock for Intel-based servers Output Features: • 4 - 0.7V current-mode differential CPU pairs • 5 - 0.7V current-mode differential SRC pair • 4 - PCI (33MHz) • 3 - PCICLK_F, (33MHz) free-running • 1 - 48MHz • 2 - REF, 14.318MHz Features/Benefits: • Supports spread spectrum modulation, 0 to -0.5% down spread • Uses external 14.318MHz crystal and external load capacitors for low ppm synthesis error • CPU clocks independent of SRC/PCI clocks • D2/D3 SMBus address Key Specifications: • PCIe Gen 2 compliant SRC outputs • QPI & FBD 2 compliant CPU clocks • CPU cycle-cycle jitter: < 50ps • SRC cycle-cycle jitter: < 125ps • PCI cycle-cycle jitter: < 500ps • CPU output skew: < 50ps • SRC output skew: < 250ps • ± 100ppm frequency accuracy on all outputs Functionality FS_C1 0 0 0 0 1 1 1 1 FS_B1 0 0 1 1 0 0 1 1 FS_A2 0 1 0 1 0 1 0 1 CPU MHz 266.67 133.33 200.00 166.67 333.33 100.00 400.00 SRC PCI REF MHz MHz MHz 100.00 33.33 14.32 Reserved USB MHz 48.00 1. FS_B and FS_C are three-level inputs. Please see VIL_FS and VIH_FS specifications in the Input/Supply/Common Output Parameters Table for correct values. Also refer to the Test Clarification Table. 2. FS_A is a low-threshold input. Please see the VIL_FS and VIH_FS specifications in the Input/Supply/Common Output Parameters Table for correct values. Pin Configuration VDDPCI 1 GNDPCI 2 PCICLK0 3 PCICLK1 4 PCICLK2 5 PCICLK3 6 GNDPCI 7 VDDPCI 8 PCICLK_F0 9 PCICLK_F1 10 PCICLK_F2 11 VDD48 12 48MHz 13 GND48 14 VDDSRC 15 SRCCLKT0 16 SRCCLKC0 17 SRCCLKC1 18 SRCCLKT1 19 GNDSRC 20 SRCCLKT2 21 SRCCLKC2 22 SRCCLKC3 23 SRCCLKT3 24 VDDSRC 25 SRCCLKT4 26 SRCCLKC4 27 VDDSRC 28 56 FS_C/TEST_SEL 55 REF0 54 REF1 53 VDDREF 52 X1 51 X2 50 GNDREF 49 FS_B/TEST_MODE 48 FS_A 47 VDDCPU 46 CPUCLKT0 45 CPUCLKC0 44 VDDCPU 43 CPUCLKT1 42 CPUCLKC1 41 GNDCPU 40 CPUCLKT2 39 CPUCLKC2 38 VDDCPU 37 CPUCLKT3 36 CPUCLKC3 35 VDDA 34 GNDA 33 IREF 32 NC 31 Vtt_PwrGd#/PD 30 SDATA 29 SCLK 56-pin SSOP & TSSOP IDTTM PCIe Gen2 and QPI Clock for Intel-Based Servers 1340G—01/26/10 1 1 page ICS932S421B PCIe Gen2 and QPI Clock for Intel-Based Servers Single-ended Output Terminations ICS932S421B SEPP Output Buffer (Single Ended Push Pull) Zo Rs Test Load Zo Rs CL=5pF CL=5pF Zo Rs SEPP Output Buffer (Single Ended Push Pull) CL=5pF The singled-ended outputs of the ICS 932S421B default to a drive strength of 2 loads. The REF clocks can be turned down to 1-load strength via the SMBus. Suggested termination resistors are as follows for transmission lines with Zo = 50 ohms: Single-ended outputs at 2-load strength (Power up default for all single-ended outputs) Driving 1 load, Rs = 33 ohms Driving 2 loads, Rs = 7.5 ohms Single-ended outputs at 1-load strength (REF clock only) Driving 1 load, Rs = 22 ohms IDTTM PCIe Gen2 and QPI Clock for Intel-Based Servers 5 1340G—01/26/10 5 Page ICS932S421B PCIe Gen2 and QPI Clock for Intel-Based Servers Differential Clock AC Tolerances CPU SRC PPM tolerance 100 100 Cycle to Cycle Jitter 50 125 Spread -0.50% -0.50% DOT96 100 250 0 BMC133 100 125 -0.50% ppm ps % Clock Periods - Differential Outputs with Spread Spectrum Disabled Measurement Window SSC ON Center Freq. MHz 1 Clock -c2c jitter AbsPer Min 1us -SSC Short-Term Average Min 0.1s - ppm Long-Term Average Min 0.1s 0 ppm Period Nominal 0.1s + ppm Long-Term Average Max 100.00 9.94900 9.99900 10.00000 10.00100 133.33 7.44925 7.49925 7.50000 7.50075 CPU 166.67 200.00 5.94940 4.94950 5.99940 4.99950 6.00000 5.00000 6.00060 5.00050 266.67 3.69962 3.74962 3.75000 3.75037 333.33 2.94970 2.99970 3.00000 3.00030 400.00 2.44975 2.49975 2.50000 2.50025 SRC 100.00 9.87400 9.99900 10.00000 10.00100 1us +SSC Short-Term Average Max 1 Clock +c2c jitter Units Notes AbsPer Max 10.05100 7.55075 6.05060 5.05050 3.80037 3.05030 2.55025 10.12600 ns ns ns ns ns ns ns ns 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1,2 Clock Periods - Differential Outputs with Spread Spectrum Enabled Measurement Window SSC ON Center Freq. MHz 1 Clock -c2c jitter AbsPer Min 1us -SSC Short-Term Average Min 0.1s - ppm Long-Term Average Min 0.1s 0 ppm Period Nominal 0.1s + ppm Long-Term Average Max 99.75 9.94906 9.99906 10.02406 10.02506 10.02607 133.00 7.44930 7.49930 7.51805 7.51880 7.51955 CPU 166.25 199.50 5.94944 4.94953 5.99944 4.99953 6.01444 5.01203 6.01504 5.01253 6.01564 5.01303 266.00 3.69965 3.74965 3.75902 3.75940 3.75977 332.50 2.94972 2.99972 3.00722 3.00752 3.00782 399.00 2.44977 2.49977 2.50602 2.50627 2.50652 SRC 99.75 9.87406 9.99906 10.02406 10.02506 10.02607 1us +SSC Short-Term Average Max 10.05107 7.53830 6.03064 5.02553 3.76915 3.01532 2.51277 10.05107 1 Clock +c2c jitter Units Notes AbsPer Max 10.10107 7.58830 6.08064 5.07553 3.81915 3.06532 2.56277 10.17607 ns ns ns ns ns ns ns ns 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1Guaranteed by design and characterization, not 100% tested in production. 2 All Long Term Accuracy specifications are guaranteed with the assumption that the crystal input is tuned to exactly 14.31818MHz. IDTTM PCIe Gen2 and QPI Clock for Intel-Based Servers 11 1340G—01/26/10 11 Page

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ICS932S421B	PCIe Gen2 and QPI Clock	IDT

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