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Número de pieza | NLU1GT125 | |
Descripción | Non-Inverting 3-State Buffer | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NLU1GT125
Non-Inverting 3-State
Buffer, TTL Level
LSTTL−Compatible Inputs
The NLU1GT125 MiniGatet is an advanced CMOS high−speed
non−inverting buffer in ultra−small footprint.
The NLU1GT125 requires the 3−state control input OE to be set
High to place the output in the high impedance state.
The device input is compatible with TTL−type input thresholds and
the output has a full 5.0 V CMOS level output swing.
The NLU1GT125 input and output structures provide protection
when voltages up to 7.0 V are applied, regardless of the supply voltage.
Features
• High Speed: tPD = 3.8 ns (Typ) @ VCC = 5.0 V
• Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
• TTL−Compatible Input: VIL = 0.8 V; VIH = 2.0 V
• CMOS−Compatible Output:
VOH > 0.8 VCC; VOL < 0.1 VCC @ Load
• Power Down Protection Provided on inputs
• Balanced Propagation Delays
• Ultra−Small Packages
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These are Pb−Free Devices
OE 1
6 VCC
IN A 2
5 NC
www.onsemi.com
MARKING
DIAGRAMS
UDFN6
1.2 x 1.0
7M
CASE 517AA
1
UDFN6
1.0 x 1.0
CASE 517BX
LM
1
UDFN6
1.45 x 1.0
CASE 517AQ
DM
1
7 = Device Marking
M = Date Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 4 of
this data sheet.
GND 3
4 OUT Y
Figure 1. Pinout (Top View)
OE
IN A
OUT Y
Figure 2. Logic Symbol
FUNCTION TABLE
Input
A OE
Output
Y
LL
HL
XH
L
H
Z
PIN ASSIGNMENT
1 OE
2 IN A
3 GND
4 OUT Y
5 NC
6 VCC
© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 6
1
Publication Order Number:
NLU1GT125/D
1 page NLU1GT125
PACKAGE DIMENSIONS
UDFN6, 1.2x1.0, 0.4P
CASE 517AA
ISSUE C
D
PIN ONE
REFERENCE
2X
ÉÉÉÉ
0.10 C
2X TOP VIEW
0.10 C
0.10 C
10X 0.08 C SIDE VIEW
13
A
B
E
(A3)
A
A1
EDGE OF PACKAGE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
L1 AND IS MEASURED BETWEEN 0.25 AND
0.30 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
DETAIL A
PAD AS WELL AS THE TERMINALS.
Bottom View
MILLIMETERS
(Optional)
DIM MIN MAX
A 0.45 0.55
EXPOSED Cu
MOLD CMPD
A1 0.00 0.05
A3 0.127 REF
ÉÉÉÉÉÉ
A1 DETAIL B
b 0.15 0.25
D 1.20 BSC
A3
E 1.00 BSC
e 0.40 BSC
L 0.30 0.40
L1 0.00 0.15
L2 0.40 0.50
Side View
(Optional)
SEATING
PLANE
C
MOUNTING FOOTPRINT*
6X
0.42
6X
0.22
5X L
L2
6X b
0.10
0.05
CAB
C NOTE 3
6
4
e
BOTTOM VIEW
0.40
PITCH
1.07
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
5
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet NLU1GT125.PDF ] |
Número de pieza | Descripción | Fabricantes |
NLU1GT125 | Non-Inverting 3-State Buffer | ON Semiconductor |
NLU1GT126 | Non-Inverting 3-State Buffer | ON Semiconductor |
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