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PDF 9FGP204 Data sheet ( Hoja de datos )
| Número de pieza | 9FGP204 | |
| Descripción | FREQUENCY TIMING GENERATOR | |
| Fabricantes | IDT | |
| Logotipo |  |
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DATASHEET
Frequency Timing Generator for Peripherals
9FGP204
Recommended Application:
Peripheral Clock for Intel Server
Output Features:
• 1 - 0.7V current-mode differential CPU pair
• 6 - 50MHz RMII outputs
• 2 - 125MHz RGMII outputs
• 1 - DOT 96MHz output
• 1 - 33.33MHz output
• 1 - 32.768KHz output
• 2 - 25MHz REF outputs
Key Specifications:
• Exact synthesis on CPU, RGMII, RMII & 33.33MHz
clocks
• +/- 100ppm frequency accuracy on other clocks
Features/Benefits:
• Selectable SMBus Address - D0/D1 or C0/C1
• Spread Spectrum capability on CPU and DOT 96MHz
clocks
• SMBus Control:
- M/N and spread programming on CPU and DOT
96MHz clocks via SMBus
- Differential outputs can be disabled via pins or SMBus
Pin Configuration
40 39 38 37 36 35 34 33 32 31
GND 1
30 GNDRMII
VDD96 2
29 RMII2
DOT96SST 3
28 RMII3
DOT96SSC 4
27 GNDRMII
OE_96 5
OE_CPU 6
9FGP204
26 VDDRMII
25 RMII4
CPUCLKT0 7
24 RMII5
CPUCLKC0 8
23 VDD33
VDDCPU 9
22 33.33MHZ/**SMBADR
GNDCPU 10
21 GND33
11 12 13 14 15 16 17 18 19 20
40-MLF
* Internal Pull-Up Resistor
** Internal Pull-Dow n Resistor
Functionality
CPU FS2 CPU FS1 CPU FS0 CPUCLK DOT96SS
Byte0 Bit2 Byte0 Bit1 Byte0 Bit0 MHz
MHz
0 0 0 266.67 96.00
0 0 1 133.33 96.00
0 1 0 200.00 96.00
0 1 1 166.67 96.00
1 0 0 333.33 96.00
1 0 1 100.00 96.00
1 1 0 400.00 96.00
1 1 1 Reserved 96.00
Power up default is highlighted.
33.33
MHz
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
RMII
MHz
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
RGMII
MHz
125.00
125.00
125.00
125.00
125.00
125.00
125.00
125.00
25
MHz
25.00
25.00
25.00
25.00
25.00
25.00
25.00
25.00
32.768
KHz
32.768
32.768
32.768
32.768
32.768
32.768
32.768
32.768
SMBus Address Selection
SMBADR
*SMBADR = 0 SMBADR = 1
D0/D1
C0/C1
* Default value
IDT® Frequency Timing Generator for Peripherals
1
1604B—08/29/11
1 page  
9FGP204
Frequency Timing Generator for Peripherals
Truth Table 1: VttPwr_GD/PD# and OE_96
VttPwr_GD/PD#
Pin 40
OE_96
Pin 5
Clocks
00
All clocks are powered down
01
All clocks are powered down
1 0 All clocks are enabled except DOT96SS
1 1 *All clocks are enabled including DOT96SS
*Assuming DOT96 Output Enable from SMBus Byte2 Bit0 sets to enable (default)
Truth Table 2: VttPwr_GD/PD# and OE_CPU
VttPwr_GD/PD# OE_CPU
Pin 40
Pin 6
Clocks
00
All clocks are powered down
01
All clocks are powered down
1 0 All clocks are enabled except CPUCLK
1 1 *All clocks are enabled including CPUCLK
*Assuming CPUCLK Output Enable from SMBus Byte2 Bit1 sets to enable (default)
Table 1: CPU Spread and Frequency Selection
CPU
CPU
CPU
CPU
SS_EN
FS2
FS1
FS0 CPU
Byte 0
Byte 0
Byte 0
Byte 0
MHz
Bit 3
Bit 2
Bit 1
Bit 0
0 0 0 0 266.67
0 0 0 1 133.33
0 0 1 0 200.00
0 0 1 1 166.67
0 1 0 0 333.33
0 1 0 1 100.00
0 1 1 0 400.00
0 1 1 1 200.00
1 0 0 0 266.67
1 0 0 1 133.33
1 0 1 0 200.00
1 0 1 1 166.67
1 1 0 0 333.33
1 1 0 1 100.00
1 1 1 0 400.00
1 1 1 1 200.00
Down
Spread %
0%
0%
0%
0%
0%
0%
0%
0%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
IDT® Frequency Timing Generator for Peripherals
5
1604B—08/29/11
5 Page 
9FGP204
Frequency Timing Generator for Peripherals
Electrical Characteristics - 33.33MHz
PARAMETER
SYMBOL
CONDITIONS*
MIN TYP MAX UNITS NOTES
Long Accuracy
ppm
see Tperiod min-max values
-100
0
100 ppm
1
Clock period
Tperiod 33.33MHz output non-spread 29.9970 30.0000 30.0030 ns
1
Output High Voltage
VOH
IOH = -1 mA
2.4
V1
Output Low Voltage
VOL
IOL = 1 mA
0.4 V 1
Output High Current
IOH
V OH @MIN = 1.0 V
VOH@MAX = 3.135 V
-33
mA
-33 mA
1
1
Output Low Current
IOL
VOL @ MIN = 1.95 V
VOL @ MAX = 0.4 V
30
mA 1
38 mA 1
Rise Time
tr
VOL = 0.4 V, VOH = 2.4 V
0.5 0.87 2 ns 1
Fall Time
tf
VOH = 2.4 V, VOL = 0.4 V
0.5 1.35 2 ns 1
Duty Cycle
dt1
VT = 1.5 V
45 50.7 55 % 1
Jitter, Cycle to cycle
tjcyc-cyc
VT = 1.5 V
104 350 ps 1
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, CL = 5 pF with Rs as shown in the termination table (unless otherwise specified)
1Guaranteed by design and characterization, not 100% tested in production.
Electrical Characteristics - 32.768KHz
PARAMETER
SYMBOL
CONDITIONS*
MIN TYP MAX UNITS NOTES
Long Accuracy
ppm
see Tperiod min-max values
-100
-79
100 ppm
1
Clock period
Tperiod
32.768KHz output nominal
30.5149 30.5180 30.5211 us
1
Output High Voltage
VOH
IOH = -1 mA
2.4
V1
Output Low Voltage
VOL
IOL = 1 mA
0.4 V 1
Output High Current
IOH
V OH @MIN = 1.0 V
VOH@MAX = 3.135 V
-33
mA
-33 mA
1
1
Output Low Current
IOL
VOL @ MIN = 1.95 V
VOL @ MAX = 0.4 V
30
mA 1
38 mA 1
Rise Time
tr
VOL = 0.4 V, VOH = 2.4 V
1 1.39 4 ns 1
Fall Time
tf
VOH = 2.4 V, VOL = 0.4 V
1 1.6
4 ns 1
Duty Cycle
dt1
VT = 1.5 V
45 49.5 55 % 1
Jitter, Cycle to cycle
tjcyc-cyc
VT = 1.5 V
220 500 ps 1
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, CL = 5 pF with Rs as shown in the termination table (unless otherwise specified)
1Guaranteed by design and characterization, not 100% tested in production.
IDT® Frequency Timing Generator for Peripherals
11
1604B—08/29/11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet 9FGP204.PDF ] | |
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