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PDF S6E2D35G0A Data sheet ( Hoja de datos )
| Número de pieza | S6E2D35G0A | |
| Descripción | Microcontroller | |
| Fabricantes | Spansion | |
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S6E2D3 Series
32-bit ARM® Cortex®-M4F based Microcontroller
S6E2D35J0A/S6E2D35G0A/S6E2D35GJA
Data Sheet (Full Production)
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Spansion Inc. deems the products to have been in sufficient production volume
such that subsequent versions of this document are not expected to change. However, typographical or
specification corrections, or modifications to the valid combinations offered may occur.
Publication Number S6E2D3_DS709-00023 Revision 1.0 Issue Date April 21, 2015
1 page  
DataSheet
14.7. Low-Voltage Detection Characteristics ...................................................................................... 170
14.7.1. Low-Voltage Detection Reset ........................................................................................ 170
14.7.2. Interrupt of Low-Voltage Detection................................................................................. 170
14.8. MainFlash Memory Write/Erase Characteristics ........................................................................ 171
14.9. VFLASH Memory Write/Erase Characteristics........................................................................... 171
14.10. Standby Recovery Time........................................................................................................... 172
14.10.1. Recovery Cause: Interrupt/WKUP ............................................................................... 172
14.10.2. Recovery Cause: Reset ............................................................................................... 174
15. Ordering Information........................................................................................................................... 176
16. Package Dimensions........................................................................................................................... 177
17. Major Changes ..................................................................................................................................... 181
April 21, 2015, S6E2D3_DS709-00023-1v0-E
5
5 Page 
DataSheet
Clock and Reset
Clocks
Five clock sources (two external oscillators, two internal CR oscillator, and Main PLL) that are dynamically
selectable.
− Main clock:
− Sub Clock :
− High-speed internal CR Clock:
− Low-speed internal CR Clock:
− Main PLL Clock
Resets
− Reset requests from INITX pin
− Power on reset
− Software reset
− Watchdog timers reset
− Low voltage detector reset
− Clock supervisor reset
4 MHz to 20 MHz
32.768 kHz
4 MHz
100 kHz
Clock Super Visor (CSV)
Clocks generated by internal CR oscillators are used to supervise abnormality of the external clocks.
External OSC clock failure (clock stop) is detected, reset is asserted.
External OSC frequency anomaly is detected, interrupt or reset is asserted.
Low-Voltage Detector (LVD)
This Series include 2-stage monitoring of voltage on the VCC pins. When the voltage falls below the voltage
has been set, Low-Voltage Detector generates an interrupt or reset.
LVD1: error reporting via interrupt
LVD2: auto-reset operation
Low-Power Consumption Mode
Six low-power consumption modes are supported.
Sleep
Timer
RTC
Stop
Deep standby RTC (selectable from with/without RAM retention)
Deep standby Stop (selectable from with/without RAM retention)
Peripheral Clock Gating
The system can reduce the current consumption of the total system with gating the operation clocks of
peripheral functions not used.
April 21, 2015, S6E2D3_DS709-00023-1v0-E
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet S6E2D35G0A.PDF ] | |
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