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PDF CD22103AD Data sheet ( Hoja de datos )

Número de pieza CD22103AD
Descripción CMOS HDB3 High Density Bipolar 3 Transcoder for 2.048/8.448Mb/s Transmission Applications
Fabricantes Intersil Corporation 
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No Preview Available ! CD22103AD Hoja de datos, Descripción, Manual

Data Sheet
CD22103A
January 1997 File Number 1310.3
CMOS HDB3 (High Density Bipolar 3)
Transcoder for 2.048/8.448Mb/s
Transmission Applications
The CD22103A is an LSI SOS integrated circuit which
performs the HDB3 transmission coding and reception
decoding functions with error detection. It is used in
2.048Mb/s and 8.448Mb/s transmission applications. The
CD22103A performs HDB3 coding and decoding for data
rates from 50Kb/s to 10Mb/s in a manner consistent with
CCITT G703 recommendations.
HDB3 transmission coding/reception decoding with code
error detection is performed in independent coder and
decoder sections. All transmitter and receiver inputs/outputs
are TTL compatible.
The HDB3 transmitter coder codes an NRZ binary unipolar
input signal (NRZ-IN) and a synchronous transmission clock
(CTX) into two HDB3 binary unipolar RZ output signals
(+HDB3 OUT, -HDB3 OUT). The TTL compatible output
signals +HDB3 OUT, -HDB3 OUT are externally mixed to
generate ternary bipolar HDB3 signals for driving
transmission lines.
The receiver decoder converts binary unipolar inputs
(+HDB3 IN, -HDB3 IN), which were externally split from
ternary bipolar HDB3 signals, and a synchronous clock
signal (CRX) into binary unipolar NRZ signals (NRZ-OUT).
The CD22103A operates with a 5V ±10% power supply
voltage over the full military temperature range at data rates
from 50Kb/s up to 10Mb/s.
Block Diagram
HDB3/AMI
CTX
NRZ-IN
ENCODER
IN
TRANSMITTER
CODER
LTE
+HDB3 OUT
-HDB3 OUT
CKR
+HDB3 IN
-HDB3 IN
CRX
DECODER
REQUIRES CLOCK
RECOVERY CIRCUIT
RECEIVER
DECODER NRZ-OUT
ERROR
DETECT
ERR
RAIS
AIS
DETECT
AIS
Features
• HDB3 Coding and Decoding for Data Rates from 50Kb/s
to 10Mb/s in a Manner Consistent with CCITT G703
Recommendations
• HDB3/AMI Transmission Coding/Reception Decoding with
Code Error Detection is Performed in Independent Coder
and Decoder Sections
• All Transmitter and Receiver Inputs/Outputs are TTL
Compatible
• Internal Loop Test Capability
• Pin and Functionally Compatible with Type MJ1471
Ordering Information
PART
NUMBER
CD22103AD
CD22103AE
TEMP. RANGE
(oC) PACKAGE
-55 to 125 16 Ld SBDIP
-40 to 85 16 Ld PDIP
PKG. NO.
D16.3
E16.3
Pinout
CD22103A (PDIP, SBDIP)
TOP VIEW
NRZ-IN 1
CTX 2
HDB3/AMI 3
NRZ-OUT 4
CRX 5
RAIS 6
AIS 7
VSS 8
16 VDD
15 +HDB3 OUT
14 -HDB3 OUT
13 +HDB3 IN
12 LTE
11 -HDB3 IN
10 CKR
9 ERR
68 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

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CD22103AD pdf
CD22103A
HDB3 RECEIVED SIGNAL
EXTERNALLY
SPLIT
+HDB3 IN
-HDB3 IN
CKR
EXTERNALLY
GENERATED
CRX
HANDLING DELAY
NRZ - OUT
FIGURE 2. RECEIVER DECODER OPERATION TIMING WAVEFORMS - HDB3 TO NRZ DECODING
CTX
NRZ - IN
+HDB3 OUT
OR
-HDB3 OUT
tRCL
90%
10%
tS
tFCL
50%
tDD
tWCL
tH
tW
FIGURE 3. TRANSMITTER CODER TIMING WAVEFORMS
CRX
10%
tFCL
90%
50%
tS
tRCL
50%
+HDB3 IN
-HDB3 IN
tINCKR
CKR
tDD
NRZ - OUT
tWCL
tH
50%
50%
50%
tW
50%
FIGURE 4. INPUT REQUIREMENTS AND OUTPUT CHARACTERISTICS
72

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