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PDF CD14538BMS Data sheet ( Hoja de datos )

Número de pieza CD14538BMS
Descripción CMOS Dual Precision Monostable Multivibrator
Fabricantes Intersil Corporation 
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No Preview Available ! CD14538BMS Hoja de datos, Descripción, Manual

CD14538BMS
November 1994
CMOS Dual Precision
Monostable Multivibrator
Features
• High-Voltage Type (20V Rating)
• Retriggerable/Resettable Capability
• Trigger and Reset Propagation Delays Inde-
pendent of RX, CX
• Triggering From Leading or Trailing Edge
• Q and Q Buffered Outputs Available
• Separate Resets
• Wide Range of Output-Pulse Widths
• Schmitt-Trigger Input Allows Unlimited Rise
and Fall Times On +TR and -TR Inputs
• 100% Tested For Maximum Quiescent Cur-
rent at 20V
• Maximum Input Current of 1µA at 18V Over
Full Package-Temperature Range:
- 100nA at 18V and +25oC
• Noise Margin (Full Package-Temperature
Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
• Standardized Symmetrical Output Charac-
teristics
• Meets All Requirements of JEDEC Tentative
Standards No. 13B, “Standard Specifica-
tions for Description of “B” Series CMOS
Device’s
Applications
• Pulse Delay and Timing
• Pulse Shaping
Description
CD14538BMS dual precision monostable multivibrator provides stable retrigger-
able/resettable one-shot operation for any fixed-voltage timing application.
An external resistor (RX) and an external capacitor (CX) control the timing and
accuracy for the circuit. Adjustment of RX and CX provides a wide range of out-
put pulse widths from the Q and Q terminals. The time delay from trigger input to
output transition (trigger propagation delay) and the time delay from reset input
to output transition (reset propagation delay) are independent of RX and CX. Pre-
cision control of output pulse widths is achieved through linear CMOS tech-
niques.
Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) inputs are pro-
vided for triggering from either edge of an input pulse. An unused +TR input
should be tied to VSS. An unused -TR input should be tied to VDD. A RESET
(on low level) is provided for immediate termination of the output pulse or to pre-
vent output pulses when power is turned on. An unused RESET input should be
tied to VDD. However, if an entire section of the CD14538BMS is not used, its
inputs must be tied to either VDD or VSS. See Table 1.
In normal operation the circuit retriggers (extends the output pulse one period)
on the application of each new trigger pulse. For operation in the non-retrigger-
able mode, Q is connected to -TR when leading-edge triggering (+TR) is used
or Q is connected to +TR when trailing-edge triggering (-TR) is used. The time
period (T) for this multivibrator can be calculated by: T = RXCX.
The minimum value of external resistance, RX is 4K. The minimum and maxi-
mum values of external capacitance, CX, are 0pF and 100µF, respectively.
The CD14538BMS is interchangeable with type MC14538 and is similar to and
pin-compatible with the CD4098B* and CD4538B**.
* T = 0.5 RXCX for CX 1000pF.
* T = RXCX; CX min = 5000pF.
The CD14538BMS is supplied in these 16-lead outline packages:
Braze Seal DIP H4X
Frit Seal DIP
H1L
Ceramic Flatpack H6W
Pinout
CD14538BMS
TOP VIEW
CX1 1
RXCX (1) 2
RESET (1) 3
+TR (1) 4
-TR (1) 5
Q1 6
Q1 7
VSS 8
16 VDD
15 CX2
14 RXCX (2)
13 RESET (2)
12 +TR (2)
11 -TR (2)
10 Q2
9 Q2
Functional Diagram
CX1 RX1
VDD
1 2 RXCX(1)
+TR 4
-TR 5
RESET 3
MONO1
6 Q1
7 Q1
+TR 12
-TR 11
RESET 13
MONO2
10 Q2
9 Q2
VDD = 16
VSS = 8
15 14 RXCX(2)
CX2 RX2
VDD
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
7-640
File Number 3192

1 page




CD14538BMS pdf
Specifications CD14538BMS
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC
PARAMETER
SYMBOL
DELTA LIMIT
Supply Current - MSI-2
Output Current (Sink)
Output Current (Source)
IDD
IOL5
IOH5A
± 1.0µA
± 20% x Pre-Test Reading
± 20% x Pre-Test Reading
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Initial Test (Pre Burn-In)
100% 5004
1, 7, 9
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
Interim Test 2 (Post Burn-In)
100% 5004
1, 7, 9
PDA (Note 1)
100% 5004
1, 7, 9, Deltas
Interim Test 3 (Post Burn-In)
100% 5004
1, 7, 9
PDA (Note 1)
100% 5004
1, 7, 9, Deltas
Final Test
100% 5004
2, 3, 8A, 8B, 10, 11
Group A
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Group D
Sample 5005
1, 2, 3, 8A, 8B, 9
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
READ AND RECORD
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A, RONDEL10
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
CONFORMANCE GROUPS
Group E Subgroup 2
TABLE 7. TOTAL DOSE IRRADIATION
MIL-STD-883
METHOD
TEST
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
READ AND RECORD
PRE-IRRAD
POST-IRRAD
1, 9 Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
Static Burn-In 1
(Note 1)
OPEN
6, 7, 9, 10
GROUND
1, 3 - 5, 8, 11 - 13,
15
VDD
2, 14, 16
9V ± -0.5V
50kHz
25kHz
Static Burn-In 2
(Note 1)
6, 7, 9, 10
1, 8, 15
2 - 5, 11 - 13, 14,
16
Dynamic Burn-
In (Note 1)
-
1, 4, 8, 12, 15
2, 14, 16
6, 7, 9, 10
5, 11
3, 13
Irradiation
(Note 2)
2, 6, 7, 9, 10, 14
1, 8, 15
3 - 5, 11 - 13, 16
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD
= 10V ± 0.5V
7-644

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